CesiumAstro logo

FPGA Verification Engineer

CesiumAstro

On-site
Austin, TX
Full-time
Mid Level
2+ yrs
Salary not listedPosted 1mo ago

Real job — pulled straight from CesiumAstro’s careers page · Verified July 15, 2026 · No reposts.

Job description

CesiumAstro is hiring a FPGA Verification Engineer — a full-time, based in Austin, TX role. Apply directly on CesiumAstro's careers page below.

FPGA Verification Engineer II

Team: FPGA

Location: Austin, TX

Commitment: Full-time

Workplace Type: onsite

Please Note: To conform with the United States Government Space Technology Export Regulations, the applicant must be a U.S. citizen, lawful permanent resident of the U.S., conditional resident, asylee or refugee (protected individuals as defined by 8 U.S.C. 1324b(a)(3)), or eligible to obtain the required authorizations from the U.S. Department of State.

At CesiumAstro, we are developers and pioneers of out-of-the-box communication systems for satellites, UAVs, launch vehicles, and other space and airborne platforms. We take pride in our dynamic and cross-functional work environment, which allows us to learn, develop, and engage across our organization. If you are looking for hands-on, interactive, and autonomous work, CesiumAstro is the place for you. We are actively seeking passionate, collaborative, energetic, and forward-thinking individuals to join our team.

We are looking to add a Verification Engineer II to our team. If you enjoy working in a startup environment and are passionate about developing leading-edge phased arrays for satellites, spacecraft, and aerospace systems, we would like to hear from you.

JOB DUTIES AND RESPONSIBILITIES

  • Contribute to the evaluation and technical implementation of FPGA and digital design simulation, verification and emulation infrastructure.
  • Contribute to the development, maintenance and phased deployment of continuous integration and regression testing infrastructure.
  • Develop state-of-the-art UVMf-based top-level and module-level testbenches using block-to-top best practices for reusability, including both control and data plane stimulation using VIP & System Verilog DPI-C integration with existing MATLAB and Python numerical models.
  • Lead the development of reusable custom VIP modules.
  • Work closely with the engineering and senior leadership teams to train and mentor engineers at all experience levels on UVMf testbench usage and modern approaches to FPGA/digital design. Work with the modeling and scientific staff to implement DPI-C dataplane verification interfaces into existing MATLAB and Python models.
  • Aid the Lead Verification Engineer in evaluating current processes regarding FPGA and digital design with a focus on Xilinx TLM models and QEMU-RP integration.
  • Work closely with vendors to define requirements of future simulation model deliverables.
  • Maintain up-to-date knowledge of industry best-practices regarding FPGA and digital design methodologies.
  • Work closely with the engineering leadership team to evaluate and non-disruptively implement process improvements.

JOB REQUIREMENTS AND MINIMUM QUALIFICATIONS

  • A Bachelor of Science (BS) or Master of Science (MS) degree in Computer Science, Electrical Engineering, or Computer Engineering.
  • Minimum of 2 years of industry experience in verification and automation.
  • Knowledge of FPGA digital design verification techniques including VHDL, Verilog, SystemVerilog, C/C++, SystemC, UVM/UVMf, DPI-C, TLM, Formal CDC and functional analysis, QEMU and VIP.
  • Understanding of digital design automation infrastructure, including CI, regression testing and HIL testing.
  • Competency with Linux.
  • Knowledge of vendor-provided FPGA development tools with a focus on Xilinx tools.
CesiumAstro considers several factors when extending an offer, including but not limited to, the role and associated responsibilities, a candidate’s work experience, education/training, and key skills. Full-time employment offers include company stock options and a generous benefits package including health, dental, vision, HSA, FSA, life, disability and retirement plans.
 
CesiumAstro is an Equal Opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, disability, protected Veteran Status, or any other characteristic protected by applicable federal, state, or local law.

Please note: CesiumAstro does not accept unsolicited resumes from contract agencies or search firms. Any unsolicited resumes submitted to our website or to CesiumAstro team members will be considered property of CesiumAstro, and we will not be obligated to pay any referral fees.

Get FPGA Verification Engineer jobs like this

New roles from thousands of companies land hourly, straight from their careers pages. Get the freshest matches by email so you never miss one.

Email me new jobs
Kairos Power logo

Senior Reactor Protection System Design Engineer

$141k–$165kAlameda, CA
✓ From careers page· 9h ago
Spire Global logo

Spacecraft Electronics Engineer

Glasgow, Scotland
✓ From careers page· 10h ago
SambaNovaSystems logo

Principal Design Verification Engineer

$180k–$255kSan Jose, CA
✓ From careers page· 11h ago
Broadcom logo

Design Verification Engineer

$144k–$230kBroomfield, CO
✓ From careers page· 13h ago

Frequently asked questions

What skills are required for FPGA Verification Engineer at CesiumAstro?

The required skills for FPGA Verification Engineer at CesiumAstro include: FPGA, SystemVerilog, Verilog, VHDL, C++, Linux, Matlab, Python.

What is the seniority level for FPGA Verification Engineer at CesiumAstro?

FPGA Verification Engineer at CesiumAstro is a Mid Level level position.

How do I apply for FPGA Verification Engineer at CesiumAstro?

You can view the full description and apply for FPGA Verification Engineer at CesiumAstro on EchoJobs: https://echojobs.io/job/cesiumastro-fpga-verification-engineer-ii-x24l2.