Cadence Design Systems logo

Lead Analog IC Design Engineer

Cadence Design Systems

On-site
San Jose, CA
Full-time
Lead
Senior
3+ yrs
$119k–$221kPosted 3h ago

Real job — pulled straight from Cadence Design Systems’s careers page · Verified October 7, 2026 · No reposts.

Job description

Cadence Design Systems is hiring a Lead Analog IC Design Engineer — a full-time, based in San Jose, CA role ($119k–$221k). Apply directly on Cadence Design Systems's careers page below.

Lead Analog IC Design Engineer

Location: SAN JOSE

Time Type: Full time

Job Description

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Role Overview

The Lead Analog IC Design Engineer is responsible for designing and developing analog and mixed-signal circuits- from initial concept and specification through final verification- to ensure conformance with customer requirements.

 

Required Qualifications

• At least three years of experience designing and developing CMOS SerDes or high-speed I/O integrated circuits.

• Design experience with most of the following SerDes circuit blocks: Transmitters and receivers, serializers and deserializers, phase interpolators, low-jitter PLLs, high-speed clock-distribution circuits, bias circuits, and voltage regulators.

• Good understanding of jitter and signal-equalization techniques.

• Proficiency with CAD tools for circuit simulation, layout, and physical verification.

• Master’s degree or Ph.D. in electrical engineering.

• Strong problem-solving skills and analog design aptitude.

• Clear written and verbal communication skills.

• Ability to collaborate effectively in a team environment.

 

Preferred Qualifications

• Working knowledge of common SerDes standards and their electrical requirements.

• Experience with Cadence design tools and laboratory testing.

• Design experience at data rates above 10 Gbps and in process technologies below 28 nm.

 


The annual salary range for California is $119,000 to $221,000. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.

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Frequently asked questions

What is the salary for Lead Analog IC Design Engineer at Cadence Design Systems?

The estimated salary range for Lead Analog IC Design Engineer at Cadence Design Systems is $119,000 - $221,000 USD per year.

What is the seniority level for Lead Analog IC Design Engineer at Cadence Design Systems?

Lead Analog IC Design Engineer at Cadence Design Systems is a Lead / Senior level position.

How do I apply for Lead Analog IC Design Engineer at Cadence Design Systems?

You can view the full description and apply for Lead Analog IC Design Engineer at Cadence Design Systems on EchoJobs: https://echojobs.io/job/cadence-design-systems-lead-analog-ic-design-engineer-e0743.