Design Verification Engineer

Location: USA-CA San Jose Innovation Drive

Time Type: Full time

Job Description

Please Note:

1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account)

2. If you already have a Candidate Account, please Sign-In before you apply.

Job Description:

The ASIC Product Division in Broadcom, a leading supplier of state-of-the-art SoC and embedded IP, is looking for qualified individuals to work in SoC and IP development programs. The candidate will be joining a high performance design team responsible for state-of-the-art subsystem development to meet customer requirements.

The engineer will be responsible for a variety of advanced verification tasks such as: verification environment development using modern verification techniques (System Verilog and UVM); designing verification components such as UVM agents, and behavioral models; implementing coverage and assertions using System Verilog; and developing random & directed test cases against the specification. This position will also be responsible for analyzing and debugging simulation failures, as well as analyzing coverage results. Candidate must be a highly productive individual contributor with a demonstrated technical capability in system and sub-block level verification.

Job Requirements:

• A Bachelor’s Degree in Electrical and Electronic Engineering, Computer Science, or equivalent

• 12+ years relevant industry experience preferred

• Experience in verifying designs at system level and block level.

• Fluent knowledge of RTL verification methodologies including System Verilog.

• Strong experience in ASIC design verification flows and DV methodologies

• Strong working knowledge of object oriented verification languages (OVM, UVM, etc.), C/C++, Perl, and scripting skills.

• Strong and independent design debugging capability.

• Strong verbal and written communication skills. Must be comfortable working in a team environment with verification team and design team members.

• Demonstrated ability to analyze and resolve complex verification trade-off scenarios.

• Must have legal authorization to work in the US

The candidate should have expertise in some (or preferably all) of the following areas:

• Experience with hardware design and debug, C++/SystemC and other programming languages are a strong plus.

• Experience working with Emulators and FPGA based prototyping a plus.

• Familiarity with overall chip design methodologies and tools

• Knowledge of CPU, DDR, Bus Protocol, Network Protocol or DSP design preferred

Additional Job Description:

Compensation and Benefits

The annual base salary range for this position is $143,800 - $230,000. 

As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements.

Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.

Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.

If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.