Physical Design Engineer

Department: Silicon Engineering

Location: Eindhoven (hybrid), Porto, Bristol (on-site), Leuven (on-site)

Employment Type: FullTime

About Us

Axelera AI is not your regular deep-tech startup. We are creating the next-generation AI platform to support anyone who wants to help advancing humanity and improve the world around us.

In just four years, we have raised a total of $370 million and have built a world-class team of 220+ employees (including 49+ PhDs with more than 40,000 citations), both remotely from 18 different countries and with offices in Belgium, France, Switzerland, Italy, the UK, headquartered at the High Tech Campus in Eindhoven, Netherlands.

We have also launched our Metis™ AI Platform, which achieves a 3-5x increase in efficiency and performance, and have visibility into a strong business pipeline exceeding $100 million.

Our unwavering commitment to innovation has firmly established us as a global industry pioneer.

Are you up for the challenge?

Position Overview

As a Physical Design Engineer at Axelera AI, you will be an integral part of the team developing cutting-edge multi-core in-memory compute SoCs. Working closely with senior engineers and cross-functional teams, you will gain hands-on experience across all stages of ASIC Physical Design - from RTL to GDS - including synthesis, place and route, timing analysis, and physical verification.

Key Responsibilities

• Support synthesis, floorplanning, place and route, extraction, timing analysis, and physical verification tasks

• Participate in constraint generation, timing analysis, and optimisation.

• Apply clock tree synthesis (CTS) techniques.

• Integration of IPs including memories, I/Os, and embedded processors.

• Work with EDA tools such as Primetime, StarRC, Fusion Compiler, Formality, Primetime, and Calibre.

• Write and maintain automation scripts in Python, Tcl, or Bash to support flow development.

• Debug physical design issues with support from the broader team.

• Collaborate with architecture, RTL, and verification teams.

Qualifications

• 1-5 years of experience in Physical Design or a related field (internship or academic project experience welcome).

• BSc or MSc in Electrical & Electronic Engineering, Computer Engineering, or a related discipline.

• An understanding of ASIC design flow (RTL to GDS).

• Demonstrable experience with EDA tools (Fusion Compiler Innovus, Primetime, Calibre, Redhawk)

• Experience scripting in TCL and Python.

• Eagerness to learn, problem-solve, and work in a collaborative environment.

• Fluent in English (spoken and written).

Nice to Have

• Experience with device physics, spice simulation, analogue design.

• Interest in AI hardware or compute architecture.

Location

We offer a flexible working arrangement, with options to:

• Work from one of our Axelera AI offices (Leuven in Belgium, Eindhoven in the Netherlands, Porto in Portugal, or Bristol in the United Kingdom) if you're already based in the vicinity.

• Relocate with us and work from the Netherlands (Eindhoven).

What we offer

This is your chance to shape and be part of a dynamic, fast-growing, international organization. We offer an attractive compensation package, including a pension plan, extensive employee insurances and company share options.

An open culture that supports creativity and continual innovation is awaiting you. Collaborative ownership and freedom with responsibility is characteristic for the way we act and work as a team.

At Axelera AI, we wholeheartedly embrace equal opportunity and hold diversity in the highest regard. Our steadfast commitment is to cultivate a warm and inclusive environment that empowers and celebrates every member of our team. We welcome applicants from all backgrounds to join us in shaping the future of AI.