Senior Firmware Engineer – DDR Memory

Job Description:

As an Astera Labs Senior Firmware Engineer, you will be designing and developing Firmware for validation and productization of DDR and other future looking memory technologies for Astera Labs CXL solutions.

Basic qualifications:

• Bachelors in Electrical Engineering / Electronics / Computer Science or related fields.

Required experience:

• 3+ years of experience on writing and maintaining FW for DDR or related memory technologies
• Strong Firmware development skills in C within Embedded environments
• Good understanding of DDR, Optane memory technologies at the controller and PHY Level
• Good knowledge in DDR training and/or controller features including RAS
• Ability to plan implementation and unit level testing of DDR features

Preferred experience:

• Post-Silicon validation and bring-up of memory interfaces.
• Knowledge of memory validation and electrical validation of DDR protocol
• Knowledge of advanced features in DDR5 like ECS/PPR/Chip Kill
• Knowledge of memory performance tuning for latency and bandwidth