Sr. Silicon Design Engineer

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ SENIOR SILICON DESIGN ENGINEER THE ROLE: ASIC chip block level backend flow owner. The focus of this role is to plan, build and maintain the entire backend flow ranging from Syntehsize to Post Route and ECO.   KEY RESPONSIBILITIES:  Release and maintain backend flow Work closely with CAD team on fixing flow bugs and developing/implementing new features Work closely with project team and provide technical support to block owners Develop new flow methodologies to drive better PPA   PREFERRED EXPERIENCE:  Bachelors with 7+ years or Masters with 4+ years hands on experiences in large scale ASIC chip physical design Excellent problem-solving and debugging skills Strong scripting skills Good English skill Familiarity with EDA tools is a plus 5nm+ technology experience is a plus   ACADEMIC CREDENTIALS:  Bachelors or Masters degree in Computer Engineering/Electrical Engineering LOCATION: Shanghai #LI-VC1 Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

SENIOR SILICON DESIGN ENGINEER THE ROLE: ASIC chip block level backend flow owner. The focus of this role is to plan, build and maintain the entire backend flow ranging from Syntehsize to Post Route and ECO.   KEY RESPONSIBILITIES:  Release and maintain backend flow Work closely with CAD team on fixing flow bugs and developing/implementing new features Work closely with project team and provide technical support to block owners Develop new flow methodologies to drive better PPA   PREFERRED EXPERIENCE:  Bachelors with 7+ years or Masters with 4+ years hands on experiences in large scale ASIC chip physical design Excellent problem-solving and debugging skills Strong scripting skills Good English skill Familiarity with EDA tools is a plus 5nm+ technology experience is a plus   ACADEMIC CREDENTIALS:  Bachelors or Masters degree in Computer Engineering/Electrical Engineering LOCATION: Shanghai #LI-VC1

Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Tags: No, CNY ¥286,440.00/Yr., CNY ¥409,200.00/Yr., Global Careers (do not use for US or Canada)