Senior Manager, RTL Design

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. SENIOR MANAGER SILICON DESIGN ENGINEER RTL DESIGN MANAGER THE ROLE: We are seeking an experienced RTL Design Manager to lead a high‑performance design team responsible for delivering industry‑leading DDR IP. The ideal candidate has a strong technical background in digital logic design, deep expertise in RTL development flows, and a passion for building and mentoring world‑class engineering teams. This role requires close collaboration with architecture, verification, physical design, firmware, and program management to ensure high-quality, on‑time silicon delivery. THE PERSON: You are a leader that builds world class teams by mentoring and developing team members, fostering technical growth and a culture of innovation. You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different geographies. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. KEY RESPONSIBILITIES: Technical Leadership Delivering industry-leading DDR IP solutions that set new benchmarks for speed, bandwidth, efficiency, latency, and power Collaborating with architects, verification, physical implementation, firmware, and post-silicon teams to achieve product success Drive the end-to-end RTL design process for complex IP blocks from micro-architecture definition through production Collaborate with architecture teams to evaluate specifications and develop micro-architecture solutions driving technical innovation that strengthens AMD’s leadership Oversee integration of IP blocks into SoCs Work closely with verification team define verification strategy, test plans and coverage Ensure design meets performance, power, functionality, and quality requirements. Provide technical guidance on design methodology, timing, power, and area tradeoff decisions Providing expert support and problem-solving for customers Team & Project Management Growing a world-class engineering team and ensuring continued excellence Lead, mentor, and grow a team of RTL design engineers; support career development and performance feedback. Drive resource planning, task allocation, and schedule management. Foster a culture of technical excellence, accountability, and continuous improvement. Partner with cross-functional teams to ensure alignment on milestones, risks, and dependencies. Manage design reviews, documentation quality, and signoff readiness Quality & Execution Establish and maintain robust design methodologies, coding guidelines, and best practices. Ensure high-quality RTL delivery through lint, CDC, DFT, synthesis readiness, and signoff checks. Identify and resolve execution risks early, driving mitigations and corrective actions. Champion automation and flow improvements to enhance productivity and quality PREFERRED EXPERIENCE: Minimum of 15+ years of experience in digital logic design Minimum 2 years’ experience in people management and employee development Experience with Verilog / System Verilog Hardware Description Language Proficiency in synthesizable Verilog and System Verilog design concepts and implementation Experience with high-speed design and PPA optimization Strong understanding of computer architecture Strong background in front-end design flows and EDA tools: simulation, linting, synthesis, static timing analysis (STA), cross-domain clocking, DFT, and power optimization Experience with digital logic verification and UVM Experience with scripting languages such as Perl, Python, or TCL Experience with scheduling, planning, and issue and risk management Experience in advanced process nodes (e.g., 5nm, 7nm, etc.). Must be a self-starter and be able to independently and efficiently drive tasks to completion Excellent communication skills Experience with DDR or LPDDR is preferred ACADEMIC CREDENTIALS: Bachelors or Masters degree in computer engineering/Electrical Engineering #LI-SR5 Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here. This posting is for an existing vacancy.

SENIOR MANAGER SILICON DESIGN ENGINEER RTL DESIGN MANAGER THE ROLE: We are seeking an experienced RTL Design Manager to lead a high‑performance design team responsible for delivering industry‑leading DDR IP. The ideal candidate has a strong technical background in digital logic design, deep expertise in RTL development flows, and a passion for building and mentoring world‑class engineering teams. This role requires close collaboration with architecture, verification, physical design, firmware, and program management to ensure high-quality, on‑time silicon delivery. THE PERSON: You are a leader that builds world class teams by mentoring and developing team members, fostering technical growth and a culture of innovation. You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different geographies. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. KEY RESPONSIBILITIES: Technical Leadership Delivering industry-leading DDR IP solutions that set new benchmarks for speed, bandwidth, efficiency, latency, and power Collaborating with architects, verification, physical implementation, firmware, and post-silicon teams to achieve product success Drive the end-to-end RTL design process for complex IP blocks from micro-architecture definition through production Collaborate with architecture teams to evaluate specifications and develop micro-architecture solutions driving technical innovation that strengthens AMD’s leadership Oversee integration of IP blocks into SoCs Work closely with verification team define verification strategy, test plans and coverage Ensure design meets performance, power, functionality, and quality requirements. Provide technical guidance on design methodology, timing, power, and area tradeoff decisions Providing expert support and problem-solving for customers Team & Project Management Growing a world-class engineering team and ensuring continued excellence Lead, mentor, and grow a team of RTL design engineers; support career development and performance feedback. Drive resource planning, task allocation, and schedule management. Foster a culture of technical excellence, accountability, and continuous improvement. Partner with cross-functional teams to ensure alignment on milestones, risks, and dependencies. Manage design reviews, documentation quality, and signoff readiness Quality & Execution Establish and maintain robust design methodologies, coding guidelines, and best practices. Ensure high-quality RTL delivery through lint, CDC, DFT, synthesis readiness, and signoff checks. Identify and resolve execution risks early, driving mitigations and corrective actions. Champion automation and flow improvements to enhance productivity and quality PREFERRED EXPERIENCE: Minimum of 15+ years of experience in digital logic design Minimum 2 years’ experience in people management and employee development Experience with Verilog / System Verilog Hardware Description Language Proficiency in synthesizable Verilog and System Verilog design concepts and implementation Experience with high-speed design and PPA optimization Strong understanding of computer architecture Strong background in front-end design flows and EDA tools: simulation, linting, synthesis, static timing analysis (STA), cross-domain clocking, DFT, and power optimization Experience with digital logic verification and UVM Experience with scripting languages such as Perl, Python, or TCL Experience with scheduling, planning, and issue and risk management Experience in advanced process nodes (e.g., 5nm, 7nm, etc.). Must be a self-starter and be able to independently and efficiently drive tasks to completion Excellent communication skills Experience with DDR or LPDDR is preferred ACADEMIC CREDENTIALS: Bachelors or Masters degree in computer engineering/Electrical Engineering #LI-SR5

Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here. This posting is for an existing vacancy.

Tags: No, INR ₹5,751,200.00/Yr., INR ₹8,216,000.00/Yr., Global Careers (do not use for US or Canada)