SOC PDN Lead (SMTS Silicon Design Engineer)

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ SMTS SILICON DESIGN ENGINEER THE ROLE: This role demands strong technical expertise in PDN design, electromigration (EM), IR drop analysis, and power integrity, along with effective leadership skills to guide and mentor a team of engineers focused on power distribution and integrity solutions. THE PERSON: As the PDN Lead, you will be responsible for designing, analyzing, and optimizing the Power Delivery Network (PDN) for complex System-on-Chip (SoC) designs. You will work closely with cross-functional teams to ensure that the PDN meets power integrity, signal integrity, and reliability requirements across advanced technology nodes. KEY RESPONSIBLITIES: Perform and lead in-depth electromigration (EM) and IR drop analysis for Soc designs, identifying areas of concern and implementing mitigation strategies to meet power integrity and reliability requirements. Work closely with physical design, package, and RTL teams to define PDN architecture, ensure robust power grid structures, and optimize on-chip decoupling. Develop, implement, and maintain EM/IR analysis flows and methodologies using tools like Synopsys RedHawk. Create and refine scripts to automate analysis and reporting tasks. Perform comprehensive signal integrity (SI) and power integrity (PI) analysis across various operating modes and temperatures, collaborating with packaging and PCB design teams to ensure robust end-to-end PDN performance. Identify root causes of EM/IR issues, work with design teams to implement fixes, and ensure solutions are verified through simulations. Mentor junior engineers in EM/IR best practices, provide training on analysis tools, and share expertise on reliability issues PREFERRED EXPERIENCE Proficiency in PDN analysis and EDA tools such as Synopsys Redhawk, or equivalent tools for power and EM/IR analysis. Strong understanding of electromigration, IR drop, and power integrity challenges in modern SoC designs. Experience in power grid design, power/ground plane distribution, and decoupling strategies. Advanced scripting skills (Python, Tcl, Perl) for automation of PDN design flows and custom analysis tasks. Strong analytical and problem-solving skills, excellent communication skills, and the ability to collaborate across multiple teams and disciplines. ACADEMIC CREDENTIALS: Bachelors or Masters degree in computer engineering/Electrical Engineering #LI-PM2 Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

SMTS SILICON DESIGN ENGINEER THE ROLE: This role demands strong technical expertise in PDN design, electromigration (EM), IR drop analysis, and power integrity, along with effective leadership skills to guide and mentor a team of engineers focused on power distribution and integrity solutions. THE PERSON: As the PDN Lead, you will be responsible for designing, analyzing, and optimizing the Power Delivery Network (PDN) for complex System-on-Chip (SoC) designs. You will work closely with cross-functional teams to ensure that the PDN meets power integrity, signal integrity, and reliability requirements across advanced technology nodes. KEY RESPONSIBLITIES: Perform and lead in-depth electromigration (EM) and IR drop analysis for Soc designs, identifying areas of concern and implementing mitigation strategies to meet power integrity and reliability requirements. Work closely with physical design, package, and RTL teams to define PDN architecture, ensure robust power grid structures, and optimize on-chip decoupling. Develop, implement, and maintain EM/IR analysis flows and methodologies using tools like Synopsys RedHawk. Create and refine scripts to automate analysis and reporting tasks. Perform comprehensive signal integrity (SI) and power integrity (PI) analysis across various operating modes and temperatures, collaborating with packaging and PCB design teams to ensure robust end-to-end PDN performance. Identify root causes of EM/IR issues, work with design teams to implement fixes, and ensure solutions are verified through simulations. Mentor junior engineers in EM/IR best practices, provide training on analysis tools, and share expertise on reliability issues PREFERRED EXPERIENCE Proficiency in PDN analysis and EDA tools such as Synopsys Redhawk, or equivalent tools for power and EM/IR analysis. Strong understanding of electromigration, IR drop, and power integrity challenges in modern SoC designs. Experience in power grid design, power/ground plane distribution, and decoupling strategies. Advanced scripting skills (Python, Tcl, Perl) for automation of PDN design flows and custom analysis tasks. Strong analytical and problem-solving skills, excellent communication skills, and the ability to collaborate across multiple teams and disciplines. ACADEMIC CREDENTIALS: Bachelors or Masters degree in computer engineering/Electrical Engineering #LI-PM2

Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Tags: No, INR ₹4,686,640.00/Yr., INR ₹6,695,200.00/Yr., Global Careers (do not use for US or Canada)