Silicon Design Engineer

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE: Control Fabric (CF) IP is the backbone of AMD SOCs. We design and deliver cutting-edge technologies of System reset and boot, network-on-chip, data compression, advanced power management, clocking, etc. The SRDC CF team is a critical part of global CF team.    THE PERSON:  Candidate will work as IP design engineer in CF team on development of industry leading chiplet fabric and system management blocks.   KEY RESPONSIBILITIES:  Block level and subsystem level micro-architecture, RTL design, static verification, synthesize and timing closure Deliver CF high quality IP to SoCs, meet power, area, timing, schedule bounding box, and other metrics   PREFERRED EXPERIENCE:  Good experience on system IP design in complex SoC, system reset and boot, advanced power management, clocking and etc Strong skills on Verilog HDL or System Verilog Strong knowledge on AMBA(AXI/AHB/APB) bus Familiar with Front-End design and implementation flow Knowledge on synthesis, STA, CDC Network-on-chip experience is a plus Strong analytical and problem-solving skills Excellent communication skills and experience collaborating with global projects colleague Low power design experience is a plus Good skills on Perl/Python script Exposure to leadership or mentorship is an asset Fluent English communication skills(listening, speaking and writing)      ACADEMIC CREDENTIALS:  Bachelors or Masters degree in computer engineering/Electrical Engineering LOCATION: Shanghai #LI-EH1 Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here. This posting is for an existing vacancy.

THE ROLE: Control Fabric (CF) IP is the backbone of AMD SOCs. We design and deliver cutting-edge technologies of System reset and boot, network-on-chip, data compression, advanced power management, clocking, etc. The SRDC CF team is a critical part of global CF team.    THE PERSON:  Candidate will work as IP design engineer in CF team on development of industry leading chiplet fabric and system management blocks.   KEY RESPONSIBILITIES:  Block level and subsystem level micro-architecture, RTL design, static verification, synthesize and timing closure Deliver CF high quality IP to SoCs, meet power, area, timing, schedule bounding box, and other metrics   PREFERRED EXPERIENCE:  Good experience on system IP design in complex SoC, system reset and boot, advanced power management, clocking and etc Strong skills on Verilog HDL or System Verilog Strong knowledge on AMBA(AXI/AHB/APB) bus Familiar with Front-End design and implementation flow Knowledge on synthesis, STA, CDC Network-on-chip experience is a plus Strong analytical and problem-solving skills Excellent communication skills and experience collaborating with global projects colleague Low power design experience is a plus Good skills on Perl/Python script Exposure to leadership or mentorship is an asset Fluent English communication skills(listening, speaking and writing)      ACADEMIC CREDENTIALS:  Bachelors or Masters degree in computer engineering/Electrical Engineering LOCATION: Shanghai #LI-EH1

Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here. This posting is for an existing vacancy.

Tags: No, CNY ¥407,680.00/Yr., CNY ¥582,400.00/Yr., Global Careers (do not use for US or Canada)