Silicon Design Engineer

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE: It is a must that the candidate has one or more of the following experience/knowledge, such as X86/ARM/8051 architecture, AMBA(AXI/AHB/APB) bus, USB(3.0/2.0/1.1; HSIC/host/device/OTG) system, NAND Flash host controller/BCH/double-data-rate interface, PCI-E/PCI bus, low power design, clock generation and control, SD/eMMC host controller, SATA/SAS, Legacy IPs (SPI/SMBUS/ACPI/LPC/GPIO), General connectivity IPs (I2S/I2C/UART), Ethernet, JTAG, etc.   THE PERSON:  The candidate is expected to exhibit strong verbal and written communication skills in both Chinese and English; specialized knowledge; broad technical knowledge that facilitates integrative thinking and drives the execution of high-quality, timely results; the capability to solve complex, novel, and non-recurring problems; and the ability to make critical decisions in technical areas.   KEY RESPONSIBILITIES:  Work with team members and apply current functional verification techniques to perform and improve pre-silicon verification quality and product Time to Market for Southbridge Provide the technical leadership to the DV team for the new Southbridge project Work independently on various DV tasks and provide technical guidance to the DV team. Be involved technically in the porting/creation of the DV environment for the new design, block and chip level test plan creation and implementation, coverage analysis, and regression cleanup   PREFERRED EXPERIENCE:  Master's in Electrical Engineering, Computer Science, or related Good understanding of ASIC design verification flow RTL coding with Verilog/System Verilog and familiar with front-end design flow and C/C++ programming experiences Knowledge of Perl, OVL, SVA, SV, UVM, OVM, script programming, etc. USB experience is a plus   ACADEMIC CREDENTIALS:  MSEE or BSEE with solid and independent experiences in digital ASIC/SOC or IP/SOC design verification LOCATION: Hsinchu/Taipei #LI-IH1 Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here. This posting is for an existing vacancy.

THE ROLE: It is a must that the candidate has one or more of the following experience/knowledge, such as X86/ARM/8051 architecture, AMBA(AXI/AHB/APB) bus, USB(3.0/2.0/1.1; HSIC/host/device/OTG) system, NAND Flash host controller/BCH/double-data-rate interface, PCI-E/PCI bus, low power design, clock generation and control, SD/eMMC host controller, SATA/SAS, Legacy IPs (SPI/SMBUS/ACPI/LPC/GPIO), General connectivity IPs (I2S/I2C/UART), Ethernet, JTAG, etc.   THE PERSON:  The candidate is expected to exhibit strong verbal and written communication skills in both Chinese and English; specialized knowledge; broad technical knowledge that facilitates integrative thinking and drives the execution of high-quality, timely results; the capability to solve complex, novel, and non-recurring problems; and the ability to make critical decisions in technical areas.   KEY RESPONSIBILITIES:  Work with team members and apply current functional verification techniques to perform and improve pre-silicon verification quality and product Time to Market for Southbridge Provide the technical leadership to the DV team for the new Southbridge project Work independently on various DV tasks and provide technical guidance to the DV team. Be involved technically in the porting/creation of the DV environment for the new design, block and chip level test plan creation and implementation, coverage analysis, and regression cleanup   PREFERRED EXPERIENCE:  Master's in Electrical Engineering, Computer Science, or related Good understanding of ASIC design verification flow RTL coding with Verilog/System Verilog and familiar with front-end design flow and C/C++ programming experiences Knowledge of Perl, OVL, SVA, SV, UVM, OVM, script programming, etc. USB experience is a plus   ACADEMIC CREDENTIALS:  MSEE or BSEE with solid and independent experiences in digital ASIC/SOC or IP/SOC design verification LOCATION: Hsinchu/Taipei #LI-IH1

Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here. This posting is for an existing vacancy.

Tags: No, TWD NT$1,762,950.00/Yr., TWD NT$2,518,500.00/Yr., Global Careers (do not use for US or Canada)