Senior Staff Design Verification Engineer

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ TITLE : Senior Staff Design Verification Engineer THE ROLE : This position offers an exciting opportunity to engage in design verification within a dynamic and multi-IP subsystem environment THE PERSON : We are looking for a proactive individual eager to develop their skills, ready to learn, and enthusiastic about tackling complex challenges RESPONSIBILITIES: Lead projects independently, collaborating with global teams to meet specified goals within agreed timelines Conduct in-depth analysis of logical design architectures and curate data insights for architectural assessments Enhance existing UVM test benches with advanced design verification methodology Implement new design features and functionalities Contribute to multi-IP subsystem design and verification processes Ensure effective delivery of projects, adhering to established deadlines Maintain and advance AMD’s leading technological position in the industry Demonstrate technical leadership with proven innovation across projects and departmental confines Manage projects and processes with significant strategic or commercial impact and be accountable for resultant outcomes Innovate to address complex issues and promote forward-thinking solutions across the organization Make influential technical decisions shaping product lines, go-to-market strategies, and customer satisfaction Offer strategic advisory support to management Mentor and guide experienced personnel towards growth and development Represent AMD in technical engagements with external partners, vendors, and the broader technical community Optimize test benches to achieve high levels of reusability, configurability, and scalability Advance the quality of ASIC design verification and simulation efficacy REQUIREMENTS: Extensive expertise in constructing scalable, configurable, and reusable design verification test benches Over 5 years of experience in ASIC design and verification at IP, Subsystem, or SOC levels Preferred experience and understanding of IO protocols such as AXI, PCIe, IOMMU, and/or SDXI Proficiency in writing System Verilog, TLM2.0, C++ and/or System C models for simulation, with at least 5 years of experience More than 5 years of hands-on experience in developing UVM models, checkers, stimuli, constructing UVM register models, and applying constrained random methodologies Preferred several years of experience in scripting languages, including Shell, Perl and Python Competence in creating comprehensive test plans and validation vectors to ensure functional completeness Proficiency in verification design strategies, including assertion-based design, code coverage, functional coverage, test planning, and back-annotation techniques Versatile expertise in high-level verification flows such as SV, UVM, and C++, with familiarity in industry-standard verification tools Possesses exceptional communication skills, both written and verbal in English Demonstrated strong problem-solving and analytical capabilities EDUCATION: Major in EE, CS or related, Bachelor or Master Degree Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

TITLE : Senior Staff Design Verification Engineer THE ROLE : This position offers an exciting opportunity to engage in design verification within a dynamic and multi-IP subsystem environment THE PERSON : We are looking for a proactive individual eager to develop their skills, ready to learn, and enthusiastic about tackling complex challenges RESPONSIBILITIES: Lead projects independently, collaborating with global teams to meet specified goals within agreed timelines Conduct in-depth analysis of logical design architectures and curate data insights for architectural assessments Enhance existing UVM test benches with advanced design verification methodology Implement new design features and functionalities Contribute to multi-IP subsystem design and verification processes Ensure effective delivery of projects, adhering to established deadlines Maintain and advance AMD’s leading technological position in the industry Demonstrate technical leadership with proven innovation across projects and departmental confines Manage projects and processes with significant strategic or commercial impact and be accountable for resultant outcomes Innovate to address complex issues and promote forward-thinking solutions across the organization Make influential technical decisions shaping product lines, go-to-market strategies, and customer satisfaction Offer strategic advisory support to management Mentor and guide experienced personnel towards growth and development Represent AMD in technical engagements with external partners, vendors, and the broader technical community Optimize test benches to achieve high levels of reusability, configurability, and scalability Advance the quality of ASIC design verification and simulation efficacy REQUIREMENTS: Extensive expertise in constructing scalable, configurable, and reusable design verification test benches Over 5 years of experience in ASIC design and verification at IP, Subsystem, or SOC levels Preferred experience and understanding of IO protocols such as AXI, PCIe, IOMMU, and/or SDXI Proficiency in writing System Verilog, TLM2.0, C++ and/or System C models for simulation, with at least 5 years of experience More than 5 years of hands-on experience in developing UVM models, checkers, stimuli, constructing UVM register models, and applying constrained random methodologies Preferred several years of experience in scripting languages, including Shell, Perl and Python Competence in creating comprehensive test plans and validation vectors to ensure functional completeness Proficiency in verification design strategies, including assertion-based design, code coverage, functional coverage, test planning, and back-annotation techniques Versatile expertise in high-level verification flows such as SV, UVM, and C++, with familiarity in industry-standard verification tools Possesses exceptional communication skills, both written and verbal in English Demonstrated strong problem-solving and analytical capabilities EDUCATION: Major in EE, CS or related, Bachelor or Master Degree

Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Tags: No, RSD RSD5,600,000.00/Yr., RSD RSD8,000,000.00/Yr., Global Careers (do not use for US or Canada)