Principal Software Engineer, AI Compiler Engineer

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. The Role We are hiring a Principal Software Engineer to drive technical leadership across AMD’s next‑generation NPU compiler stack. This role requires deep expertise in compiler design, hardware‑aware software optimization, and performance engineering. You will architect and implement key components of our MLIR/LLVM‑based compiler stack, contribute novel fusion and optimization strategies, and lead technical direction across teams. Key Responsibilities Provide technical leadership for the architecture and development of AMD’s NPU compiler stack. Design advanced IR transformations, graph‑level optimizations, and hardware‑aware fusion passes. Guide system-wide performance strategies using deep knowledge of HW architecture constraints (memory, parallelism, dataflows). Collaborate with hardware architects, runtime teams, and ML framework teams (ONNX, PyTorch) to drive co‑design. Drive performance investigations, benchmarking, and software‑hardware co‑optimization. Represent AMD externally through technical publications, open‑source contributions, or industry engagement. Mentor MTS/SMTS engineers and set technical direction for large compiler initiatives. Required Qualifications 12+ years of experience in compilers, performance engineering, or system-level software. Strong C++ expertise and proficiency in Python. Extensive hands-on experience with LLVM and MLIR. Experience designing optimizations tightly coupled to hardware architectures (e.g., tensor accelerators, GPUs, NPUs). Deep understanding of compiler internals: IR design, scheduling, memory optimizations, multi-stage lowering. Demonstrated experience delivering production-quality compiler or systems software. Experience driving technical strategy across teams and influencing product roadmaps. Preferred Qualifications Contributions to open‑source compiler/ML communities (LLVM, MLIR, XLA, TVM, Triton). Experience with AI/ML model execution, graph optimization, and performance tuning. Experience with domain-specific languages or IRs for machine learning. Knowledge of NPU/GPU execution models, memory hierarchies, and parallelism strategies. Education B.S., M.S., or Ph.D. in Computer Science, Computer Engineering, Electrical Engineering, or related field #LI-TC1 #LI-HYBRID . This role is not eligible for visa sponsorship. Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here. This posting is for an existing vacancy.

The Role We are hiring a Principal Software Engineer to drive technical leadership across AMD’s next‑generation NPU compiler stack. This role requires deep expertise in compiler design, hardware‑aware software optimization, and performance engineering. You will architect and implement key components of our MLIR/LLVM‑based compiler stack, contribute novel fusion and optimization strategies, and lead technical direction across teams. Key Responsibilities Provide technical leadership for the architecture and development of AMD’s NPU compiler stack. Design advanced IR transformations, graph‑level optimizations, and hardware‑aware fusion passes. Guide system-wide performance strategies using deep knowledge of HW architecture constraints (memory, parallelism, dataflows). Collaborate with hardware architects, runtime teams, and ML framework teams (ONNX, PyTorch) to drive co‑design. Drive performance investigations, benchmarking, and software‑hardware co‑optimization. Represent AMD externally through technical publications, open‑source contributions, or industry engagement. Mentor MTS/SMTS engineers and set technical direction for large compiler initiatives. Required Qualifications 12+ years of experience in compilers, performance engineering, or system-level software. Strong C++ expertise and proficiency in Python. Extensive hands-on experience with LLVM and MLIR. Experience designing optimizations tightly coupled to hardware architectures (e.g., tensor accelerators, GPUs, NPUs). Deep understanding of compiler internals: IR design, scheduling, memory optimizations, multi-stage lowering. Demonstrated experience delivering production-quality compiler or systems software. Experience driving technical strategy across teams and influencing product roadmaps. Preferred Qualifications Contributions to open‑source compiler/ML communities (LLVM, MLIR, XLA, TVM, Triton). Experience with AI/ML model execution, graph optimization, and performance tuning. Experience with domain-specific languages or IRs for machine learning. Knowledge of NPU/GPU execution models, memory hierarchies, and parallelism strategies. Education B.S., M.S., or Ph.D. in Computer Science, Computer Engineering, Electrical Engineering, or related field #LI-TC1 #LI-HYBRID . This role is not eligible for visa sponsorship.

Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here. This posting is for an existing vacancy.

Tags: No, USD $198,100.00/Yr., USD $283,000.00/Yr., US Careers (External)