Principal Silicon Design Engineer (IP Systems Engineer)

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ THE ROLE: Post-silicon become an important role to verify chip function in nowadays. Post-silicon validation team own lots of peripheral standard IP’s silicon bring-ip/validation, such as PCIE/USB/ESPI/I2C/I3C. As a Systems Engineer of IPSE, own post-silicon bring-up/feature enable of AMD internal IPs for AMD SOC projects. THE PERSON: Owns developing and executing the IP-level bring-up and feature validation plans, attempts to reproduce, triage and debug all silicon issues. KEY RESPONSIBILITIES: Define/maintain feature list. Defining and executing the overall PCIe/USB IP features test plan and post-silicon verify strategy, including required tools/scripts development. Debugging of PCIe/USB IP issues found during bring up, validation, and production phases of SOC programs, focus on dense server project mainly. Engage with post-silicon IP enablement efforts, join technical discussions to drive resolution on technical issues fix. Demonstrate IP End-to-End ownership. PREFERRED EXPERIENCE: In-depth knowledge of PC architectures, good at PCIe/USB/ESPI/I2C/I3C protocol. Strong self-learning capability, strong individual analysis, hands-on working, problem solving skills. Strong hardware experience with board design and onboard debug skill. Good communication skills and English reading/writing skill. Preferred strong programming/scripting skills (eg. C/C++, Python, Perl, Ruby, Assembly). Understand Verilog coding or DV simulation environment. Known software experience with operating system, kernel, BIOS, as a plus. ACADEMIC CREDENTIALS: MSEE or BSEE within 10 to 15 years’ experience in digital ASIC/SOC design Must first-hand Bring up or debug experience: 10+ years on Post silicon, or IP/platform board validation. LOCATION: Penang, Malaysia #LI-FY #LI-Hybrid Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

THE ROLE: Post-silicon become an important role to verify chip function in nowadays. Post-silicon validation team own lots of peripheral standard IP’s silicon bring-ip/validation, such as PCIE/USB/ESPI/I2C/I3C. As a Systems Engineer of IPSE, own post-silicon bring-up/feature enable of AMD internal IPs for AMD SOC projects. THE PERSON: Owns developing and executing the IP-level bring-up and feature validation plans, attempts to reproduce, triage and debug all silicon issues. KEY RESPONSIBILITIES: Define/maintain feature list. Defining and executing the overall PCIe/USB IP features test plan and post-silicon verify strategy, including required tools/scripts development. Debugging of PCIe/USB IP issues found during bring up, validation, and production phases of SOC programs, focus on dense server project mainly. Engage with post-silicon IP enablement efforts, join technical discussions to drive resolution on technical issues fix. Demonstrate IP End-to-End ownership. PREFERRED EXPERIENCE: In-depth knowledge of PC architectures, good at PCIe/USB/ESPI/I2C/I3C protocol. Strong self-learning capability, strong individual analysis, hands-on working, problem solving skills. Strong hardware experience with board design and onboard debug skill. Good communication skills and English reading/writing skill. Preferred strong programming/scripting skills (eg. C/C++, Python, Perl, Ruby, Assembly). Understand Verilog coding or DV simulation environment. Known software experience with operating system, kernel, BIOS, as a plus. ACADEMIC CREDENTIALS: MSEE or BSEE within 10 to 15 years’ experience in digital ASIC/SOC design Must first-hand Bring up or debug experience: 10+ years on Post silicon, or IP/platform board validation. LOCATION: Penang, Malaysia #LI-FY #LI-Hybrid

Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Tags: No, MYR RM226,800.00/Yr., MYR RM324,000.00/Yr., Global Careers (do not use for US or Canada)