
Real job — pulled straight from AMD’s careers page · Verified September 30, 2026 · No reposts.
Job description
AMD is hiring a Principal Signal Integrity Engineer — a full-time, based in San Jose, CA role ($203k–$290k). Apply directly on AMD's careers page below.
ADVANCE YOUR CAREER. ADVANCE THE WORLD.
At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future.
Whether you’re designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger — technology that moves the world forward. Join us and, together, we’ll advance your career.
THE ROLE
THE PERSON
KEY RESPONSIBILITIES:
- Responsible for technical solution development for Signal Integrity and Power Integrity.
- Drive system-level SI/PI architecture, design guidelines, and layout recommendations.
- Perform end-to-end channel simulations for high-speed serial interfaces and memory subsystems.
- Lead SI/PI analysis and optimization of DDR4, DDR5, LPDDR4, LPDDR5, HBM, and other high-performance memory interfaces.
- Correlate simulations with lab measurements and drive root-cause analysis of signal and power integrity issues.
- Collaborate with silicon, package, PCB, architecture, and manufacturing teams to resolve complex SI/PI challenges.
- Guide junior engineers on simulation methodologies, measurements, and debug techniques.
- Evaluate future package and PCB technologies to support next-generation FPGA and adaptive computing products
PREFERRED EXPERIENCE:
- Excellent analytical and problem-solving skills with strong attention to detail.
- Proven ability to independently drive technical decisions and influence engineering direction.
- Strong communication and cross-functional collaboration skills.
- Hands-on experience performing lab measurements and correlating hardware results to simulation models.
- Deep expertise in Signal Integrity with working knowledge of Power Integrity concepts and methodologies.
- Experience with DDR, LPDDR, HBM, or other high-performance memory interfaces.
- Experience with FPGA, adaptive computing, ASIC, networking, datacenter, or high-performance computing platforms.
- Experience with PCB, package, and IC-level power delivery networks.
- Expertise with SI/PI analysis tools including ADS and HFSS; experience with SIwave and HSPICE is a plus.
- Strong foundation in electromagnetic theory, transmission lines, and circuit analysis.
- Experience mentoring engineers and driving technical leadership across organizations.
- Experience with programming in Python, C++, Matlab.
ACADEMIC CREDENTIALS:
- MS or PhD in Electrical Engineering preferred
LOCATION:
- San Jose, California
#LI-DR2
#LI-Hybrid
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.
This posting is for an existing vacancy.
THE ROLE
THE PERSON
KEY RESPONSIBILITIES:
- Responsible for technical solution development for Signal Integrity and Power Integrity.
- Drive system-level SI/PI architecture, design guidelines, and layout recommendations.
- Perform end-to-end channel simulations for high-speed serial interfaces and memory subsystems.
- Lead SI/PI analysis and optimization of DDR4, DDR5, LPDDR4, LPDDR5, HBM, and other high-performance memory interfaces.
- Correlate simulations with lab measurements and drive root-cause analysis of signal and power integrity issues.
- Collaborate with silicon, package, PCB, architecture, and manufacturing teams to resolve complex SI/PI challenges.
- Guide junior engineers on simulation methodologies, measurements, and debug techniques.
- Evaluate future package and PCB technologies to support next-generation FPGA and adaptive computing products
PREFERRED EXPERIENCE:
- Excellent analytical and problem-solving skills with strong attention to detail.
- Proven ability to independently drive technical decisions and influence engineering direction.
- Strong communication and cross-functional collaboration skills.
- Hands-on experience performing lab measurements and correlating hardware results to simulation models.
- Deep expertise in Signal Integrity with working knowledge of Power Integrity concepts and methodologies.
- Experience with DDR, LPDDR, HBM, or other high-performance memory interfaces.
- Experience with FPGA, adaptive computing, ASIC, networking, datacenter, or high-performance computing platforms.
- Experience with PCB, package, and IC-level power delivery networks.
- Expertise with SI/PI analysis tools including ADS and HFSS; experience with SIwave and HSPICE is a plus.
- Strong foundation in electromagnetic theory, transmission lines, and circuit analysis.
- Experience mentoring engineers and driving technical leadership across organizations.
- Experience with programming in Python, C++, Matlab.
ACADEMIC CREDENTIALS:
- MS or PhD in Electrical Engineering preferred
LOCATION:
- San Jose, California
#LI-DR2
#LI-Hybrid
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.
This posting is for an existing vacancy.
Tags: No, USD $203,000.00/Yr., USD $290,000.00/Yr., US Careers (External)
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Frequently asked questions
What is the salary for Principal Signal Integrity Engineer at AMD?
The estimated salary range for Principal Signal Integrity Engineer at AMD is $203,000 - $290,000 USD per year.
What skills are required for Principal Signal Integrity Engineer at AMD?
The required skills for Principal Signal Integrity Engineer at AMD include: FPGA, Python, C++, Matlab.
What is the seniority level for Principal Signal Integrity Engineer at AMD?
Principal Signal Integrity Engineer at AMD is a Principal level position.
How do I apply for Principal Signal Integrity Engineer at AMD?
You can view the full description and apply for Principal Signal Integrity Engineer at AMD on EchoJobs: https://echojobs.io/job/amd-principal-signal-integrity-engineer-si-pi-4brm3.