
Real job — pulled straight from AMD’s careers page · Verified September 30, 2026 · No reposts.
Job description
AMD is hiring a Physical Design PnR Tile Lead — a full-time, based in Markham, ON role ($136k–$194k). Apply directly on AMD's careers page below.
ADVANCE YOUR CAREER. ADVANCE THE WORLD.
At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future.
Whether you’re designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger — technology that moves the world forward. Join us and, together, we’ll advance your career.
THE ROLE:
Implementing and supporting Synthesis and Place&Route Flows for a world-class Physical Design team working on IC’s targeted for Gaming Consoles, Hand-Held Gaming , Ultra-thin Laptops, etc..
You will work with the support of an excellent AMD CAD organization, and on the most advanced Tools, Flows, and Tech nodes.
THE PERSON
The ideal candidate is a recognized technical leader with a proven track record of delivering high-quality silicon across multiple successful tape-outs. You are equally comfortable solving challenging technical problems, mentoring engineers, driving execution across global teams, and influencing methodology direction.
You possess strong communication skills and can effectively engage customers, project leadership, methodology teams, and senior management while maintaining focus on execution excellence.
KEY RESPONSIBLITIES INCLUDE (BUT NOT LIMITED TO):
Setting up and supporting flows for:
- Block level synthesis
- Design-for-Power using Industry Standard Tools and Methods
- Place and Route, Clock Tree Synthesis
- ECO flow for timing and functional fixes
- Physical Design verification and analysis flow
- Optimize Physical Design Techniques to optimize for Power, Performance, and/or Area
- Enable Physical Design flows in new Technology nodes
- Updated tool versions and settings to support new nodes
- Support Physical Design Teams with critical Implementation challenges
QUALIFICATIONS:
Bachelor's Degree in Electrical/ Electronics/Computer Engineering or a directly related discipline.
Your expertise must be in one, or more, of the following areas:
- ASIC physical design implementation
- Block level implementation (Place and Route), which includes Floorplanning, Timing Closure and Physical Verification
- Physical Design verification signoff techniques such as Formal equivalence, IR&EM, Timing Closure (STA), Physical verification, VSI, Formal Equivalence Check or LEC, etc.
- Use of Industry Standard tools for CAD flow development and methodology practicing Auto Place and Route and Strategies for Static Timing Analysis
- Power, Performance and Area (PPA) optimization techniques
- Proficiency in Debugging CAD Flow issues using Industry standard Silicon Design tools: from Synopsys, Cadence, Mentor Graphics ( Fusion Complier, Synopsys ICC2, Innovus, Primetime, Spyglass, RedHawk, VSI, Calibre etc.)
Location
- Markham, ON
#LI-JE1
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.
This posting is for an existing vacancy.
THE ROLE:
Implementing and supporting Synthesis and Place&Route Flows for a world-class Physical Design team working on IC’s targeted for Gaming Consoles, Hand-Held Gaming , Ultra-thin Laptops, etc..
You will work with the support of an excellent AMD CAD organization, and on the most advanced Tools, Flows, and Tech nodes.
THE PERSON
The ideal candidate is a recognized technical leader with a proven track record of delivering high-quality silicon across multiple successful tape-outs. You are equally comfortable solving challenging technical problems, mentoring engineers, driving execution across global teams, and influencing methodology direction.
You possess strong communication skills and can effectively engage customers, project leadership, methodology teams, and senior management while maintaining focus on execution excellence.
KEY RESPONSIBLITIES INCLUDE (BUT NOT LIMITED TO):
Setting up and supporting flows for:
- Block level synthesis
- Design-for-Power using Industry Standard Tools and Methods
- Place and Route, Clock Tree Synthesis
- ECO flow for timing and functional fixes
- Physical Design verification and analysis flow
- Optimize Physical Design Techniques to optimize for Power, Performance, and/or Area
- Enable Physical Design flows in new Technology nodes
- Updated tool versions and settings to support new nodes
- Support Physical Design Teams with critical Implementation challenges
QUALIFICATIONS:
Bachelor's Degree in Electrical/ Electronics/Computer Engineering or a directly related discipline.
Your expertise must be in one, or more, of the following areas:
- ASIC physical design implementation
- Block level implementation (Place and Route), which includes Floorplanning, Timing Closure and Physical Verification
- Physical Design verification signoff techniques such as Formal equivalence, IR&EM, Timing Closure (STA), Physical verification, VSI, Formal Equivalence Check or LEC, etc.
- Use of Industry Standard tools for CAD flow development and methodology practicing Auto Place and Route and Strategies for Static Timing Analysis
- Power, Performance and Area (PPA) optimization techniques
- Proficiency in Debugging CAD Flow issues using Industry standard Silicon Design tools: from Synopsys, Cadence, Mentor Graphics ( Fusion Complier, Synopsys ICC2, Innovus, Primetime, Spyglass, RedHawk, VSI, Calibre etc.)
Location
- Markham, ON
#LI-JE1
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.
This posting is for an existing vacancy.
Tags: No, CAD $135,800.00/Yr., CAD $194,000.00/Yr., Canada Careers (External)
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Frequently asked questions
What is the salary for Physical Design PnR Tile Lead at AMD?
The estimated salary range for Physical Design PnR Tile Lead at AMD is $136,000 - $194,000 USD per year.
What is the seniority level for Physical Design PnR Tile Lead at AMD?
Physical Design PnR Tile Lead at AMD is a Manager / Staff / Principal level position.
How do I apply for Physical Design PnR Tile Lead at AMD?
You can view the full description and apply for Physical Design PnR Tile Lead at AMD on EchoJobs: https://echojobs.io/job/amd-physical-design-pnr-tile-lead-c0wxu.