Memory Subsystem Verification Engineer

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE The Memory Subsystem team at AMD is hiring a Verification Engineer – Memory Subsystem to contribute to the design, development, and verification of high-speed LPDDR/DDR memory subsystem solutions and associated IP. This role involves IP- and subsystem-level verification and participation in pre-silicon firmware and hardware co-verification using hybrid simulation environments and Universal Verification Methodology (UVM). THE PERSON We are looking for a collaborative and detail-oriented professional who is passionate about verification engineering and eager to contribute to innovative memory subsystem solutions. The ideal candidate thrives in a team environment, communicates effectively, and approaches challenges with curiosity and problem-solving skills. You should be comfortable working with experienced engineers, sharing ideas, and learning continuously while contributing to the success of complex verification projects. KEY RESPONSIBILITIES Develop and maintain UVM-based verification environments for memory subsystems and associated IP Create and execute test plans, testcases, and regressions Participate in firmware and hardware co-verification efforts Integrate and debug Memory VIP, transactors, monitors, and checkers Analyze functional and code coverage and assist in closing coverage gaps Debug simulation failures and collaboration with cross-functional teams PREFERRED EXPERIENCE Strong fundamental and foundational knowledge and application of Object-Oriented Programming Proficiency in System Verilog, UVM, and C/C++ Experience in digital design verification or related coursework Understanding of testbench architecture, assertions, and coverage Experience with Python or shell scripting Familiarity with Git and/or Perforce Exposure to DDR/JEDEC standards, DDR PHY, or memory controllers Experience with assertions (SVA/OVL) Exposure to firmware and hardware co-verification using UVM and C-DPI Familiarity with System C or architectural modeling Exposure to emulation platforms such as Zebu ACADEMIC CREDENTIALS Bachelor’s or master’s degree in electrical engineering, Computer Engineering, Computer Science, or a related field. LOCATION Austin, TX or Raleigh, NC This role is not eligible for Visa sponsorship. #LI-DP1 #LI-HYBRID Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here. This posting is for an existing vacancy.

THE ROLE The Memory Subsystem team at AMD is hiring a Verification Engineer – Memory Subsystem to contribute to the design, development, and verification of high-speed LPDDR/DDR memory subsystem solutions and associated IP. This role involves IP- and subsystem-level verification and participation in pre-silicon firmware and hardware co-verification using hybrid simulation environments and Universal Verification Methodology (UVM). THE PERSON We are looking for a collaborative and detail-oriented professional who is passionate about verification engineering and eager to contribute to innovative memory subsystem solutions. The ideal candidate thrives in a team environment, communicates effectively, and approaches challenges with curiosity and problem-solving skills. You should be comfortable working with experienced engineers, sharing ideas, and learning continuously while contributing to the success of complex verification projects. KEY RESPONSIBILITIES Develop and maintain UVM-based verification environments for memory subsystems and associated IP Create and execute test plans, testcases, and regressions Participate in firmware and hardware co-verification efforts Integrate and debug Memory VIP, transactors, monitors, and checkers Analyze functional and code coverage and assist in closing coverage gaps Debug simulation failures and collaboration with cross-functional teams PREFERRED EXPERIENCE Strong fundamental and foundational knowledge and application of Object-Oriented Programming Proficiency in System Verilog, UVM, and C/C++ Experience in digital design verification or related coursework Understanding of testbench architecture, assertions, and coverage Experience with Python or shell scripting Familiarity with Git and/or Perforce Exposure to DDR/JEDEC standards, DDR PHY, or memory controllers Experience with assertions (SVA/OVL) Exposure to firmware and hardware co-verification using UVM and C-DPI Familiarity with System C or architectural modeling Exposure to emulation platforms such as Zebu ACADEMIC CREDENTIALS Bachelor’s or master’s degree in electrical engineering, Computer Engineering, Computer Science, or a related field. LOCATION Austin, TX or Raleigh, NC This role is not eligible for Visa sponsorship. #LI-DP1 #LI-HYBRID

Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here. This posting is for an existing vacancy.

Tags: No, USD $103,950.00/Yr., USD $148,500.00/Yr., US Careers (External)