Memory/DDR IP Verification Engineer

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE The AMD UMC Team, part of the MSIP organization, is seeking a Memory/DDR IP Verification Engineer to join our growing group. We develop advanced DDR/LPDDR technologies that support data center, machine learning, client, server, embedded, graphics, and semi‑custom applications. In this role, you will contribute to all phases of IP verification, including verification architecture definition, test planning, environment development, verification execution, and final sign‑off. As a valued member of our team, you’ll help advance AMD’s ability to deliver high‑quality, industry‑leading technologies. The UMC team encourages innovation, collaboration, and continuous learning, providing opportunities for professional growth and technical development. THE PERSON You bring strong analytical and problem‑solving abilities, along with effective communication and collaboration skills. You can manage tasks independently while contributing to a team-focused environment. You feel comfortable working in a dynamic, multi‑project setting and maintain a commitment to continuous improvement, learning, and adaptability as priorities evolve. KEY RESPONSIBILITIES Collaborate with IP architects to develop verification architecture and execution plans Participate in verification of complex IP blocks and take ownership of feature‑level verification across projects Create and maintain test plans, verification environments, regression testing, and coverage closure strategies Develop, modify, and maintain VIP, libraries, verification environments, and random/directed testcases using SystemVerilog/UVM/SystemC Triage and debug regression issues Analyze functional and code coverage to ensure verification completeness Apply industry-standard verification methodologies such as UVM and formal verification Reproduce functional issues found during post-silicon testing within simulation or formal environments Conduct and participate in peer code reviews Develop and maintain scripts and tools to support improvements in infrastructure, methodology, and verification execution PREFERRED EXPERIENCE Proficiency with ASIC verification methodologies and tools Strong understanding of digital design and computer architecture Proficiency with Verilog, SystemVerilog, C/C++, UVM, object‑oriented programming, and experience in Linux and Windows environments Ability to debug SystemVerilog RTL using simulation tools Experience with security verification is an asset ACADEMIC CREDENTIALS BS/MS degree in Engineering (Electrical, Electronics, Computer) or Computer Science. This role is not eligible for visa sponsorship. #LI-DP1 #LI-HYBRID Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here. This posting is for an existing vacancy.

THE ROLE The AMD UMC Team, part of the MSIP organization, is seeking a Memory/DDR IP Verification Engineer to join our growing group. We develop advanced DDR/LPDDR technologies that support data center, machine learning, client, server, embedded, graphics, and semi‑custom applications. In this role, you will contribute to all phases of IP verification, including verification architecture definition, test planning, environment development, verification execution, and final sign‑off. As a valued member of our team, you’ll help advance AMD’s ability to deliver high‑quality, industry‑leading technologies. The UMC team encourages innovation, collaboration, and continuous learning, providing opportunities for professional growth and technical development. THE PERSON You bring strong analytical and problem‑solving abilities, along with effective communication and collaboration skills. You can manage tasks independently while contributing to a team-focused environment. You feel comfortable working in a dynamic, multi‑project setting and maintain a commitment to continuous improvement, learning, and adaptability as priorities evolve. KEY RESPONSIBILITIES Collaborate with IP architects to develop verification architecture and execution plans Participate in verification of complex IP blocks and take ownership of feature‑level verification across projects Create and maintain test plans, verification environments, regression testing, and coverage closure strategies Develop, modify, and maintain VIP, libraries, verification environments, and random/directed testcases using SystemVerilog/UVM/SystemC Triage and debug regression issues Analyze functional and code coverage to ensure verification completeness Apply industry-standard verification methodologies such as UVM and formal verification Reproduce functional issues found during post-silicon testing within simulation or formal environments Conduct and participate in peer code reviews Develop and maintain scripts and tools to support improvements in infrastructure, methodology, and verification execution PREFERRED EXPERIENCE Proficiency with ASIC verification methodologies and tools Strong understanding of digital design and computer architecture Proficiency with Verilog, SystemVerilog, C/C++, UVM, object‑oriented programming, and experience in Linux and Windows environments Ability to debug SystemVerilog RTL using simulation tools Experience with security verification is an asset ACADEMIC CREDENTIALS BS/MS degree in Engineering (Electrical, Electronics, Computer) or Computer Science. This role is not eligible for visa sponsorship. #LI-DP1 #LI-HYBRID

Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here. This posting is for an existing vacancy.

Tags: No, USD $103,950.00/Yr., USD $148,500.00/Yr., US Careers (External)