Manager Silicon Design Engineering (Emulation)

What you do at AMD changes everything At AMD, we push the boundaries of what is possible. We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, Immersive platforms, and the data center. Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results. It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world. If you have this type of passion, we invite you to look at the opportunities available to come join our team. Manager Silicon Design Engineering (Emulation) THE ROLE: As a member of the NBIO team, you will help bring to life cutting-edge designs on emulators. As a member of the NBIO emulation team, you will work closely with the architecture, IP design, design verification teams, post silicon teams, and FW teams to achieve first pass silicon success. THE PERSON: A successful candidate will work with senior design teams and mentor junior members. The candidate will be highly accurate, detail-oriented, independent, and possessing good communication and problem-solving skills. KEY RESPONSIBILITIES: Architect and design scalable emulation test benches, build flows and tools to streamline project execution. Contribute into continuously improving the emulation methodology. Experience implementing synthesizable models using SystemVerilog. Define emulation test plan and manage its execution (Functional and Performance tests) Drive debug with designers and verifiers Assist and enable emulation team to execute the test plans. Collaborate with IP design and verification teams on test planning and task execution. Work on various emulation methodologies such as: Transactors, Simulation Acceleration, Hybrid VMs Write portable tests and stimulus generation for vertical and horizontal re-use. Execute verification of the latest features and protocols Integrate, bring-up and debug standard interfaces like UART, JTAG, I2C, USB Integrate and bring-up 3rd party accelerate verification IPs. PREFERRED EXPERIENCE: Experience in system and subsystem level designs Experience with FPGA flows, synthesis and PnR Experience in RTL design, verification, and embedded FW Excellent programing skills in C/C++, SystemVerilog Experience working with Verilog/SystemVerilog based designs. Experience with UVM based testbenches. Strong debugging and problem-solving skills Debugging experience with waveform analyzers such as: Verdi, Virtuoso, Visualizer Understanding of scripting/preprocessing Experience working in emulation and prototyping. Understand AMBA, PCIe and CXL standards. ACADEMIC CREDENTIALS: PhD, BSc or MSc in computer science, computer engineering, or electrical engineering #LI-PL1 #hybrid

What you do at AMD changes everything At AMD, we push the boundaries of what is possible. We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, Immersive platforms, and the data center. Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results. It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world. If you have this type of passion, we invite you to look at the opportunities available to come join our team. Manager Silicon Design Engineering (Emulation) THE ROLE: As a member of the NBIO team, you will help bring to life cutting-edge designs on emulators. As a member of the NBIO emulation team, you will work closely with the architecture, IP design, design verification teams, post silicon teams, and FW teams to achieve first pass silicon success. THE PERSON: A successful candidate will work with senior design teams and mentor junior members. The candidate will be highly accurate, detail-oriented, independent, and possessing good communication and problem-solving skills. KEY RESPONSIBILITIES: Architect and design scalable emulation test benches, build flows and tools to streamline project execution. Contribute into continuously improving the emulation methodology. Experience implementing synthesizable models using SystemVerilog. Define emulation test plan and manage its execution (Functional and Performance tests) Drive debug with designers and verifiers Assist and enable emulation team to execute the test plans. Collaborate with IP design and verification teams on test planning and task execution. Work on various emulation methodologies such as: Transactors, Simulation Acceleration, Hybrid VMs Write portable tests and stimulus generation for vertical and horizontal re-use. Execute verification of the latest features and protocols Integrate, bring-up and debug standard interfaces like UART, JTAG, I2C, USB Integrate and bring-up 3rd party accelerate verification IPs. PREFERRED EXPERIENCE: Experience in system and subsystem level designs Experience with FPGA flows, synthesis and PnR Experience in RTL design, verification, and embedded FW Excellent programing skills in C/C++, SystemVerilog Experience working with Verilog/SystemVerilog based designs. Experience with UVM based testbenches. Strong debugging and problem-solving skills Debugging experience with waveform analyzers such as: Verdi, Virtuoso, Visualizer Understanding of scripting/preprocessing Experience working in emulation and prototyping. Understand AMBA, PCIe and CXL standards. ACADEMIC CREDENTIALS: PhD, BSc or MSc in computer science, computer engineering, or electrical engineering #LI-PL1 #hybrid

Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Tags: No, RSD RSD5,530,000.00/Yr., RSD RSD7,900,000.00/Yr., Global Careers (do not use for US or Canada)