Product Development Engineer, Signal Integrity

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At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future. 

 

Whether you’re designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger — technology that moves the world forward. Join us and, together, we’ll advance your career.

THE ROLE: 

As Signal Integrity Design Engineer, you will be responsible for SI specification definition, modeling, analysis and verification for products. You will be part of an engineering team to work on the current and next generation product performance verifications. You will lead/participate projects involving the modeling, design, verification, measurements of Signal Integrity of current and future AMD server products. You will work closely with multiple teams across IC Design, Layout, Packaging, Board, Product Engineer, Test Development, Application, Technical Service and Software to address the SIPI requirement from die, package to board level. Your specific responsibilities will include but not 
limited to the following:

 

THE PERSON: 

A successful candidate is one who can perform in a role that requires accountability for accuracy, reliability and completeness of assignment results critical to the project’s success.  

 

KEY RESPONSIBILITIES: 

• Work closely with cross-functional team and internal working group on current and next gen Server’s platform in meeting signal integrity in HVM solution space
• Electromagnetic modeling of 3-D structures including vias, connectors, sockets
• Verify and correlate post-silicon measurement against spec and collaborate fixes if needed to feedback on the next derivation silicon.
• Collaborate with working group leads for signal measurement test plans and review of measurement results.
• Deliver channel optimization (board and package), model creation and verification and simulate the overall performance to meet the channel performance. Document reports and BKM for future references.
• Be part of the team to develop and enhance next generation product and methodology
• Board/system-level power delivery network AC+DC simulation for low-voltage/ high-current supplies.
• Work with external and internal IP providers to ensure IPs performance and their proper functionality in our products.
• System-level signal integrity simulations of future DDR5 memory bus including silicon IO, package, and board.
• System-level signal integrity simulations of future high-speed SERDES links such as USB-4, PCIe5, xGMI/CXL, etc. including silicon IO, package, and board.
• Resolve challenges in the areas of high-speed board design, power and analog

PREFERRED EXPERIENCE: 

• Transmission line theory and microwave engineering concepts such as S-parameter, etc.
• Low-voltage swing signaling technologies.
• System-level timing analysis considering effects from silicon IO, package, and board.
• I/O driver/receiver modeling for state-of-the-art high-speed digital logic.
• In-depth knowledge of I/O buffer modeling, specifically behavioral (IBISlike) modeling for high speed digital logic.
• Deep expertise in at least one of the following: PCIeX Physical layer, LPDDR4/5, Power delivery design, 100+Gig interfaces.
• Hands on experience in either Silicon design or board design will be highly advantageous.
• High motivation to continuously learn and resolve new challenges
• People skills and team spirit
• Expertise in analog simulation with Seasim, S2eye, Hspice, ADS, ANSYS, or other toolsets.
• Expertise in 3-D modeling with ANSYS HFSS/Q3D and 2.5-D with ANSYS SIWAVE.
• Expertise with DSO, TDR, VNA, ParBERT measurement tools/techniques.

ACADEMIC CREDENTIALS: 

• Bachelor’s or Master’s in electrical engineering, computer engineering, or comparable disciplines.

LOCATION:

Penang, Malaysia

 

#LI-DW2

#LI-Hybrid

#LI-DNI

#L05

Benefits offered are described: AMD benefits at a glance.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

 

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

 

This posting is for an existing vacancy.

THE ROLE: 

As Signal Integrity Design Engineer, you will be responsible for SI specification definition, modeling, analysis and verification for products. You will be part of an engineering team to work on the current and next generation product performance verifications. You will lead/participate projects involving the modeling, design, verification, measurements of Signal Integrity of current and future AMD server products. You will work closely with multiple teams across IC Design, Layout, Packaging, Board, Product Engineer, Test Development, Application, Technical Service and Software to address the SIPI requirement from die, package to board level. Your specific responsibilities will include but not 
limited to the following:

 

THE PERSON: 

A successful candidate is one who can perform in a role that requires accountability for accuracy, reliability and completeness of assignment results critical to the project’s success.  

 

KEY RESPONSIBILITIES: 

• Work closely with cross-functional team and internal working group on current and next gen Server’s platform in meeting signal integrity in HVM solution space
• Electromagnetic modeling of 3-D structures including vias, connectors, sockets
• Verify and correlate post-silicon measurement against spec and collaborate fixes if needed to feedback on the next derivation silicon.
• Collaborate with working group leads for signal measurement test plans and review of measurement results.
• Deliver channel optimization (board and package), model creation and verification and simulate the overall performance to meet the channel performance. Document reports and BKM for future references.
• Be part of the team to develop and enhance next generation product and methodology
• Board/system-level power delivery network AC+DC simulation for low-voltage/ high-current supplies.
• Work with external and internal IP providers to ensure IPs performance and their proper functionality in our products.
• System-level signal integrity simulations of future DDR5 memory bus including silicon IO, package, and board.
• System-level signal integrity simulations of future high-speed SERDES links such as USB-4, PCIe5, xGMI/CXL, etc. including silicon IO, package, and board.
• Resolve challenges in the areas of high-speed board design, power and analog

PREFERRED EXPERIENCE: 

• Transmission line theory and microwave engineering concepts such as S-parameter, etc.
• Low-voltage swing signaling technologies.
• System-level timing analysis considering effects from silicon IO, package, and board.
• I/O driver/receiver modeling for state-of-the-art high-speed digital logic.
• In-depth knowledge of I/O buffer modeling, specifically behavioral (IBISlike) modeling for high speed digital logic.
• Deep expertise in at least one of the following: PCIeX Physical layer, LPDDR4/5, Power delivery design, 100+Gig interfaces.
• Hands on experience in either Silicon design or board design will be highly advantageous.
• High motivation to continuously learn and resolve new challenges
• People skills and team spirit
• Expertise in analog simulation with Seasim, S2eye, Hspice, ADS, ANSYS, or other toolsets.
• Expertise in 3-D modeling with ANSYS HFSS/Q3D and 2.5-D with ANSYS SIWAVE.
• Expertise with DSO, TDR, VNA, ParBERT measurement tools/techniques.

ACADEMIC CREDENTIALS: 

• Bachelor’s or Master’s in electrical engineering, computer engineering, or comparable disciplines.

LOCATION:

Penang, Malaysia

 

#LI-DW2

#LI-Hybrid

#LI-DNI

#L05

Benefits offered are described:  AMD benefits at a glance.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

 

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position.  AMD’s “Responsible AI Policy” is available here.

 

This posting is for an existing vacancy.

Tags: Yes, MYR RM42,700.00/Yr., MYR RM61,000.00/Yr., Global Careers (do not use for US or Canada)