Director Packaging Engineering

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ THE ROLE: This Position is for Director, EMO_BackEnd Engineering stationed in Hsinchu, Taiwan. The Ideal Candidate will have a balanced mix of strong technical knowledge as well as Leadership experience in Advanced Packaging, Bumping and Substrate Functions. THE PERSON: The successful candidates must be a team player with a commitment to lead & drive for solutions and an aptitude to thrive & ability work in a fast-paced multi-tasking environment and meeting deadlines. He or she would have excellent cross functional project management skill, conflict management skill, strong interpersonal skills with good presentation skills, people management skill on career planning & development, day to day & regular coaching & monitoring. Fluent in Spoken & Written English. KEY RESPONSIBILITIES: Responsible for CoWoS_S, CoWoS_L (EFB), FOPLP, InFO/WLFO, FCBGA, LGA and Chiplet package feasibility, development, manufacturing readiness for New Product bring up at manufacturing site and qualification to production together with Packaging team. Manage NPI to LVM to HVM, Supplier Qualification, with First pass and Issue free production for 6 months to ensure Repeatability and Reproducibility. Responsible for HVM packaging Yield, Quality to Meet and Exceed Target for all metrics, cost and operation productivity improvements and sustaining activities. Drive packaging process baseline standardization and Issue prevention/resolution through continuous improvement to achieve “best in class” quality/yield performance across OSAT’s. Responsible for the packaging interaction activities among assembly, bump, 3D IC, HBM and wafer fab, wafer sort, functional test and Mark/Pack. Drive Assembly manufacturer to enhance process, equipment & material capability for future generation/technology products and capabilities ahead of roadmap needs. Best known methods/lesson learnt fan out between sites for standardization & drive for Non-issue based CIP’s. Responsible for strategic supplier management. Quarterly Scorecard/ Performance management reviews for Packaging/Bumping and Material Suppliers. Spec management, including review/update under Back End Engineering responsibilities. Responsibilities will include defining and managing Key Program deliverables/schedules/budget/Analyze program risk and opportunities & monitor progress to drive to ensure goals are met. System Integration with Data Analytics to have real time update and control over supplier overall performance. Self-Driven/Lead, manage, develop a motivated high performance team with Improved bench strength and drive to achieve Next 5% to continue to stay ahead of the curve. Reach-out before Reached with respect to RnR. Build effective team and strategic relationship across the network. Manage and resolve conflicts. The applicant must be a team player with a commitment to meeting deadlines and an aptitude to thrive in a fast-paced multi-tasking environment. Job may include other duties as assigned/ deemed fit by supervisor. PREFERRED EXPERIENCE: Minimum 20 years+ experience in Packaging/Bumping/Materials management. Experience in InFO or 2.5D/3D Bump/TSV/Packaging or WLFO, Flip Chip BGA/LGA process knowledge and Chip-Packaging Interaction knowledge with min total 12 years Packaging/Assembly NPI to HVM work experience. Experience in Co-working/managing horizontally across multiple internal functional organization. Team player with a commitment to meeting deadlines/Lead & Drive for solutions and an aptitude to thrive in a fast-paced multi-tasking environment. Creative, Self-Driven, highly motivated individual with demonstrated ability to independently manage complex engineering tasks. Strong interpersonal communication, analytical, project management, task & time management and excellent executive presentation & communication skills. Familiar with DOE and JMP & technical report writing Ability and Willingness to travel internationally is required ACADEMIC CREDENTIALS: Bachelor/MS degree in Mechanical Electrical or Material or Chemical Engineering LOCATION: Taiwan #LI-JG2 Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

THE ROLE: This Position is for Director, EMO_BackEnd Engineering stationed in Hsinchu, Taiwan. The Ideal Candidate will have a balanced mix of strong technical knowledge as well as Leadership experience in Advanced Packaging, Bumping and Substrate Functions. THE PERSON: The successful candidates must be a team player with a commitment to lead & drive for solutions and an aptitude to thrive & ability work in a fast-paced multi-tasking environment and meeting deadlines. He or she would have excellent cross functional project management skill, conflict management skill, strong interpersonal skills with good presentation skills, people management skill on career planning & development, day to day & regular coaching & monitoring. Fluent in Spoken & Written English. KEY RESPONSIBILITIES: Responsible for CoWoS_S, CoWoS_L (EFB), FOPLP, InFO/WLFO, FCBGA, LGA and Chiplet package feasibility, development, manufacturing readiness for New Product bring up at manufacturing site and qualification to production together with Packaging team. Manage NPI to LVM to HVM, Supplier Qualification, with First pass and Issue free production for 6 months to ensure Repeatability and Reproducibility. Responsible for HVM packaging Yield, Quality to Meet and Exceed Target for all metrics, cost and operation productivity improvements and sustaining activities. Drive packaging process baseline standardization and Issue prevention/resolution through continuous improvement to achieve “best in class” quality/yield performance across OSAT’s. Responsible for the packaging interaction activities among assembly, bump, 3D IC, HBM and wafer fab, wafer sort, functional test and Mark/Pack. Drive Assembly manufacturer to enhance process, equipment & material capability for future generation/technology products and capabilities ahead of roadmap needs. Best known methods/lesson learnt fan out between sites for standardization & drive for Non-issue based CIP’s. Responsible for strategic supplier management. Quarterly Scorecard/ Performance management reviews for Packaging/Bumping and Material Suppliers. Spec management, including review/update under Back End Engineering responsibilities. Responsibilities will include defining and managing Key Program deliverables/schedules/budget/Analyze program risk and opportunities & monitor progress to drive to ensure goals are met. System Integration with Data Analytics to have real time update and control over supplier overall performance. Self-Driven/Lead, manage, develop a motivated high performance team with Improved bench strength and drive to achieve Next 5% to continue to stay ahead of the curve. Reach-out before Reached with respect to RnR. Build effective team and strategic relationship across the network. Manage and resolve conflicts. The applicant must be a team player with a commitment to meeting deadlines and an aptitude to thrive in a fast-paced multi-tasking environment. Job may include other duties as assigned/ deemed fit by supervisor. PREFERRED EXPERIENCE: Minimum 20 years+ experience in Packaging/Bumping/Materials management. Experience in InFO or 2.5D/3D Bump/TSV/Packaging or WLFO, Flip Chip BGA/LGA process knowledge and Chip-Packaging Interaction knowledge with min total 12 years Packaging/Assembly NPI to HVM work experience. Experience in Co-working/managing horizontally across multiple internal functional organization. Team player with a commitment to meeting deadlines/Lead & Drive for solutions and an aptitude to thrive in a fast-paced multi-tasking environment. Creative, Self-Driven, highly motivated individual with demonstrated ability to independently manage complex engineering tasks. Strong interpersonal communication, analytical, project management, task & time management and excellent executive presentation & communication skills. Familiar with DOE and JMP & technical report writing Ability and Willingness to travel internationally is required ACADEMIC CREDENTIALS: Bachelor/MS degree in Mechanical Electrical or Material or Chemical Engineering LOCATION: Taiwan #LI-JG2

Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Tags: No, TWD NT$3,332,980.00/Yr., TWD NT$4,761,400.00/Yr., Global Careers (do not use for US or Canada)