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DFT Engineer Intern

Ambarella

On-site
US
Full-time
Internship
Salary not listedPosted 4w ago

Real job — pulled straight from Ambarella’s careers page · Verified September 8, 2026 · No reposts.

Job description

Ambarella is hiring a DFT Engineer Intern — a full-time, based in US role. Apply directly on Ambarella's careers page below.

DFT Engineer Intern

Location: US Headquarters

Time Type: Full time

Job Description

AI Vision Processors For Edge Applications

Our solutions make cameras smarter by extracting valuable data from high-resolution video streams.

Job Description

Position Responsibilities:

  • Logic Design to support DFT features
  • Automate DFT Flows (Scan, Compression & MBIST) used for complex multi-million gate SoC
  • Verification of DFT Logic and analysis of fault coverage
  • Timing analysis for DFT Modes

Minimum Requirements:

  • MSEE in Electrical / Computer Engineering
  • Knowledge of DFT fundamentals
  • Knowledge of Logic design & Static timing analysis
  • Knowledge of Verilog and any scripting language
  • Knowledge of AI assisted programming

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Frequently asked questions

What skills are required for DFT Engineer Intern at Ambarella?

The required skills for DFT Engineer Intern at Ambarella include: Verilog, AI.

What is the seniority level for DFT Engineer Intern at Ambarella?

DFT Engineer Intern at Ambarella is a Internship level position.

How do I apply for DFT Engineer Intern at Ambarella?

You can view the full description and apply for DFT Engineer Intern at Ambarella on EchoJobs: https://echojobs.io/job/ambarella-dft-engineer-intern-utfcd.