Senior FPGA Engineer

- Bachelor's degree in Electrical Engineering or a related field with 10+ years of experience
- 7+ years of experience with Verilog and/or SystemVerilog HDL for RTL design and verification and with FPGA design tools (Vivado, Libero SoC, or equivalent)
- 7+ years of experience with simulation tools ModelSim, Vivado Simulator, or equivalent
- 5+ years of experience with UVM (SystemVerilog and/or SystemC)
- Experience with high-speed interfaces (PCIe, DDR, Ethernet, SerDes) and serial protocols (SPI, I2C, I3C, UART)
- Master's or Ph.D. degree in Electrical Engineering or related field with 7+ years of experience
- Experience with AMD Xilinx Versal ACAP FPGA architecture and development tools and with Microchip IGLOO2 FPGA platform
- Experience delivering products to volume production
- Experience with implementing chips with multiple power islands and power gating
- Experience with SOC bring-up and post-silicon validation
- Background in signal processing, communications, or related applications

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The base salary range for this position is listed below. Your Amazon package will include sign-on payments and restricted stock units (RSUs). Final compensation will be determined based on factors including experience, qualifications, and location. Amazon also offers comprehensive benefits including health insurance (medical, dental, vision, prescription, Basic Life & AD&D insurance and option for Supplemental life plans, EAP, Mental Health Support, Medical Advice Line, Flexible Spending Accounts, Adoption and Surrogacy Reimbursement coverage), 401(k) matching, paid time off, and parental leave. Learn more about our benefits at https://amazon.jobs/en/benefits.

USA, WA, Redmond - 159,200.00 - 215,300.00 USD annually
LEO is Amazon’s low Earth orbit satellite broadband network. Its mission is to deliver fast, reliable internet to customers and communities around the world, and we’ve designed the system with the capacity, flexibility, and performance to serve a wide range of customers, from individual households to schools, hospitals, businesses, government agencies, and other organizations operating in locations without reliable connectivity.

The Role:

Create FPGA solutions to support LEO's satellite communication system. This is a unique opportunity to define a new system with few legacy constraints. The FPGA design engineer will work with systems teams to define/develop/implement/test/release FPGA based solutions to enable LEO. This will focus on creating digital designs for networking functions using the latest generations of FPGA technologies and modern FPGA design processes and tools.

In this role you will:

Have ownership of one or more FPGA bitstreams. - Create and release FPGAs through the development phases of uArchitecture-RTL Design-Physical Implementation-Timing Closure–Simulation Validation– Lab Based Silicon Validation

Collaborate with network communication system architects to define and design/implement/test/release/support networking functions targeted to FPGA technology

Collaborate with Digital Communications/Networking system architects and design engineers to implement digital logic functions in FPGAs.

Collaborate with system architects and design engineers to implement digital logic functions in FPGA prototypes to validate/tradeoff architecture & design alternatives

Collaborate with systems architects, HW engineering design teams & FW/SW design teams to bring up and test systems combining FPGA, firmware, RF, and Networking functions.

Drive trade-off analysis to benefit customer experience and optimization of target technology resources for cost/size/power/performance/features

Export Control Requirement: Due to applicable export control laws and regulations, candidates must be a U.S. citizen or national, U.S. permanent resident (i.e., current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum.

Key job responsibilities
-Design, develop, and implement complex FPGA architectures using Verilog HDL
-Lead FPGA design efforts for Versal ACAP and IGLOO2 platforms from concept through production
-Develop and optimize RTL code for high-performance, resource-efficient designs
-Perform timing analysis, synthesis, place and route, and design verification
-Create comprehensive test benches and simulation environments
-Collaborate with cross-functional teams including hardware engineers, software developers, and system architects
-Debug and troubleshoot FPGA designs at both simulation and hardware levels
-Develop technical documentation including design specifications, test plans, and user guides
-Support hardware integration, manufacturing, and production deployment activities