Senior Design Verification Engineer

- Bachelor's degree in Electrical Engineering or a related field
- 7+ years of design verification experience with UVM, System Verilog and/or C based testbenches
- Master's degree or Ph.D. degree in Electrical Engineering or related field
- Experience verifying at multiple levels of logic from IP blocks to SoCs to full system testing
- Experience working with high-performance industry standard buses like AMBA AXI4
- Knowledge of serial protocols including SPI, I2C, I3C, and UART
- Experience with high speed protocols like USB, PCIE, DDR
- Experience with integrating third party VIPs
- Experience with integration verification of several third party IPs into the SoC
- Experience working with external vendors
- Experience with C/C++ and Object-Oriented Programming.
- Experience with scripting languages, for e.g. Python.

Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status.

Los Angeles County applicants: Job duties for this position include: work safely and cooperatively with other employees, supervisors, and staff; adhere to standards of excellence despite stressful conditions; communicate effectively and respectfully with employees, supervisors, and staff to ensure exceptional customer service; and follow all federal, state, and local laws and Company policies. Criminal history may have a direct, adverse, and negative relationship with some of the material job duties of this position. These include the duties and responsibilities listed above, as well as the abilities to adhere to company policies, exercise sound judgment, effectively manage stress and work safely and respectfully with others, exhibit trustworthiness and professionalism, and safeguard business operations and the Company’s reputation. Pursuant to the Los Angeles County Fair Chance Ordinance, we will consider for employment qualified applicants with arrest and conviction records.

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The base salary range for this position is listed below. Your Amazon package will include sign-on payments and restricted stock units (RSUs). Final compensation will be determined based on factors including experience, qualifications, and location. Amazon also offers comprehensive benefits including health insurance (medical, dental, vision, prescription, Basic Life & AD&D insurance and option for Supplemental life plans, EAP, Mental Health Support, Medical Advice Line, Flexible Spending Accounts, Adoption and Surrogacy Reimbursement coverage), 401(k) matching, paid time off, and parental leave. Learn more about our benefits at https://amazon.jobs/en/benefits.

USA, CA, Sunnyvale - 183,000.00 - 247,600.00 USD annually
The team that built the innovative Silicon IP AZ1 Neural Edge that is powering the latest generation of Echo devices is looking for a Senior Design Verification Engineer to continue to innovate on behalf of our customers. We are a part of Amazon Lab126 that revolutionized reading with our Kindle family of products and reimagined user experience through Echo and Alexa. We want you to help us build on the success of our first generation of ML accelerator at edge.

Work hard. Have fun. Make history.

In this role, you will be responsible for defining the verification methodology and implementing the corresponding test plan for sub-systems and the full chip. You will participate in the design verification and bring-up of the chip and subsystems by writing relevant assertions, debugging code, test benches, test harnesses, and otherwise interacting with the extended team. You will participate in the lab bring-up of these blocks either in FPGA, emulation, or silicon by potentially writing test scripts, analyzing lab data, proposing experiments, etc.

You will work closely with multi-disciplinary groups including Product Design, Audio Technology, Computer Vision, Hardware Engineering, and Software Engineering, to architect and implement complex functional block that enable development of world-class hardware devices. In this role, you will:


Design world class hardware and software

Communicate and work with team members across multiple disciplines

Deliver detailed test plans for verification of the full chip or sub-system by working with design engineers and architects

Create and enhance constrained-random verification environments using SystemVerilog and UVM

Write tests in C to run out of the CPU

Identify and write all types of coverage measures for stimulus and corner-cases.

Debug tests with design engineers to deliver functionally correct design blocks.

Close coverage measures to identify verification holes and to show progress towards tape-out.

Participate in test plan and coverage reviews


The ideal candidate should have experience with RTL development environments, fluency in modern hardware description languages and verification methodologies. They should have experience verifying complex IP blocks from scratch that have successfully been integrated in SOCs or other such silicon that have been productized in consumer devices. We are looking for a self-driven individual who can work with architects, HW and SW developers and can quickly resolve blocking issues.
Key job responsibilities


Design Verification of Subsystems such as CPU, NPU, and SOC.

Drive Verification Methodology using System Verilog / C++ based test benches.