Senior Architecture Verification Engineer, Annapurna Labs Machine Learning Acceleration

- Bachelor's degree in electrical engineering or equivalent
- 5+ years of full software development life cycle, including coding standards, code reviews, source control management, build processes, testing, and operations experience
- 5+ years of programming with at least one software programming language experience
- Experience as a mentor, tech lead or leading an engineering team
- 5+ years of experience in RTL design, dynamic verification (DV) or silicon validation
- Deep knowledge of SoC and interconnect architectures

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Custom machine learning chips are at the heart of our Trainium machine learning instances, and we invite you to build them with us!
The architecture verification team is responsible for ensuring the functionality and performance of the SoC during the design process.
As an architecture verification engineer, you will work on a wide range of disciplines and components, such as verifying the programming model and ISA of the SoC, verifying the functionality and performance of different subsystems in the SoC and verifying interconnect and interface behaviors, among others.


Key job responsibilities
As a Senior Architecture Verification Engineer you will:
* Gain a deep understanding of SoC architecture and micro-architecture
* Work with architecture, design, DV and SW teams to verify and integrate device components and functionality
* Write high quality verification and validation tests for both pre-silicon and post-silicon environments
* Build testing infrastructure, data analysis tools and developer tools