Design Verification Engineer

- Bachelor's degree in Electrical / Communications Engineering or Computer Science, or related field, or equivalent experience
- 2+ years in verification preferably in communication systems
- 2+ years in UVM
- Master's or Ph.D degree in Electrical / Communications Engineering
- 3+ years in digital verification, preferably in communication systems
- Familiarity with Matlab
- Modem design verification experience
- System C, C or Matlab model : development or DV integration experience
- Comfortable using AI-assisted tools to accelerate verification workflows (testbench generation, debug, coverage analysis).
- Familiarity with formal verification techniques
- Strong written and verbal skills

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The base salary range for this position is listed below. Your Amazon package will include sign-on payments and restricted stock units (RSUs). Final compensation will be determined based on factors including experience, qualifications, and location. Amazon also offers comprehensive benefits including health insurance (medical, dental, vision, prescription, Basic Life & AD&D insurance and option for Supplemental life plans, EAP, Mental Health Support, Medical Advice Line, Flexible Spending Accounts, Adoption and Surrogacy Reimbursement coverage), 401(k) matching, paid time off, and parental leave. Learn more about our benefits at https://amazon.jobs/en/benefits.

USA, TX, Austin - 114,600.00 - 160,400.00 USD annually
Amazon Leo is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low-latency, high-speed broadband connectivity to unserved and underserved communities around the world.

The Role:
Be part of Leo's sub-team responsible for defining and implementing the digital chip SOCs for communications via Low Earth Orbit satellites and Amazon gateways. This is a unique opportunity to define a groundbreaking wireless solution with few legacy constraints. The team works with customer requirements and wireless system teams to define modems, high-speed interfaces, embedded processors, and DSP solutions in latest CMOS generation technologies.

In this role you will:
· Implement a state of the art verification environment to facilitate testing of the RTL against reference Matlab/C models
· Develop detailed test plans and write tests, run regressions, collect coverage matrices and report progress to the program
· Participate in the validation of ASIC implementations in Verilog/SystemVerilog
· Work with the design and communication systems team and participate in system level verification using test benches constructed using UVM
· Develop a highly automated environment to run regressions that can be used to make builds and maintain organization of the database


Export Control Requirement:
Due to applicable export control laws and regulations, candidates must be a U.S. citizen or national, U.S. permanent resident (i.e., current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum.