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FPGA Silicon Validation Engineer

Altera

On-site
San Jose, CA
Full-time
Mid Level
3+ yrs
$106k–$154kPosted 2mo ago

Real job — pulled straight from Altera’s careers page · Verified June 10, 2026 · No reposts.

Job description

Altera is hiring a FPGA Silicon Validation Engineer — a full-time, based in San Jose, CA role ($106k–$154k). Apply directly on Altera's careers page below.

FPGA Silicon Validation Engineer

Location: San Jose, California, United States

Time Type: Full time

Job Description

Job Details:

Job Description:

About Altera

At Altera™, our independence as the world’s largest pureplay FPGA solutions provider gives us the focus, speed, and agility to innovate without compromise. With more than four decades of industryleading FPGA expertise, our singular mission is to deliver the programmable technologies that help customers differentiate, innovate, and scale across rapidly evolving markets like AI, cloud, networking, and edge. As an independent company, we move faster, invest deeper, and partner more closely—empowering our teams to drive breakthrough innovation and shape the future of the FPGA industry.

About the Role

We are looking for an FPGA Silicon Validation Engineer to validate and characterize cutting-edge FPGA devices and platforms. In this role, you will work closely with architecture, design, verification, firmware, software, and product engineering teams to drive silicon bring-up, debug complex system issues, and ensure successful product deployment from first silicon through production release.

The ideal candidate combines strong digital design knowledge with hands-on hardware debugging skills and a passion for solving complex system-level challenges. The role is also open to recent grads, and recent-graduates are encouraged to apply (compensation and scope will adjust accordingly).

Key Responsibilities

  • Develop and execute silicon validation plans for FPGA devices and associated IP subsystems.

  • Perform first silicon bring-up, feature validation, characterization, and production readiness testing.

  • Design, develop, and maintain validation environments, automated test frameworks, and validation infrastructure.

  • Debug silicon, FPGA fabric, embedded processor, firmware, and platform-level issues using laboratory equipment and software tools.

  • Collaborate with design, verification, architecture, firmware, software, and product engineering teams to root-cause and resolve issues.

  • Analyze failures and identify hardware, firmware, RTL, or system-level root causes.

  • Drive issue resolution through detailed debug, data collection, and technical reporting.

  • Develop customer-focused validation scenarios that reflect real-world deployments and use cases.

  • Support product qualification, customer enablement, and post-silicon debug activities.

 

Salary Range 

The pay range below is for Bay Area California only. Actual salary may vary based on a number of factors including job location, job-related knowledge, skills, experiences, trainings, etc. We also offer incentive opportunities that reward employees based on individual and company performance.  

 

$106,200 - $153,675 USD

 

We use artificial intelligence to screen, assess, or select applicants for the position. Applicants must be eligible for any required U.S. export authorizations. 

Qualifications:

Minimum Qualifications

  • Bachelor's Degree or Master's degree in Electrical Engineering (or related field) plus 3 years of industry work experience.

  • Good knowledge in FPGA architecture is an added advantage

  • Experience in developing programming languages such as C and Python is a plus

  • Experience in handling various high speed test and measurement equipment such as high bandwidth real time/sampling oscilloscope, high frequency pulse/signal , power supply is an added advantage.

  • Prior internship or work experience is preferred

Preferred Qualifications

  • Prior internship or work experience is preferred

Job Type:

Regular

Shift:

Shift 1 (United States of America)

Primary Location:

San Jose, California, United States

Additional Locations:

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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Frequently asked questions

What is the salary for FPGA Silicon Validation Engineer at Altera?

The estimated salary range for FPGA Silicon Validation Engineer at Altera is $106,000 - $154,000 USD per year.

What skills are required for FPGA Silicon Validation Engineer at Altera?

The required skills for FPGA Silicon Validation Engineer at Altera include: Python, C, FPGA.

What is the seniority level for FPGA Silicon Validation Engineer at Altera?

FPGA Silicon Validation Engineer at Altera is a Mid Level level position.

How do I apply for FPGA Silicon Validation Engineer at Altera?

You can view the full description and apply for FPGA Silicon Validation Engineer at Altera on EchoJobs: https://echojobs.io/job/altera-fpga-silicon-validation-engineer-yb0gl.