Join us on our journey to the worlds top FPGA provider! Altera develops innovative programmable logic technologies that are easy-to-use and deploy in applications from the cloud to the edge.  

As an FPGA Compiler Software Engineering Manager you will be leading a team which architects and develops cutting-edge software innovations for Quartus, our flagship tool for optimizing FPGA devices. Quartus is critical to all our FPGA acceleration technologies. The timing analysis engine within Quartus is a core component of optimizations essential for achieving high performance, area, and power efficiency in our customers' designs. 

 Key Responsibilities: 

• Lead and mentor a local team of skilled compiler software developers. 

• Architect and optimize the timing analysis engine to support next-generation FPGA devices. 

• Collaborate cross-functionally with teams that integrate with or depend on the timing analysis engine. 

• Collaborate with a variety of different teams which are customers or provides of the timing analysis engine. 

• Oversee the development and enhancement of the timing analysis user experience, enabling users to effectively determine if their designs meet timing requirements. 

• Drive research and development of innovative optimization algorithms for FPGA CAD tools, including delay estimation and scalable modular timing analysis techniques. 

• Foster a culture of high-quality software development and continuous improvement. 

• Expand Quartus’s capabilities to provide more efficient design evaluation and assistance. 

• Provide technical guidance on timing and design closure challenges. 

Who we’re looking for: 

Team players with: 

• Exceptional communication, teamwork, and interpersonal skills. 

• Intellectual curiosity and passion for new technologies. 

• Excellent problem-solving, debugging, and attention to detail. 

• Deep understanding of algorithm optimization and timing analysis for FPGA platforms.​