The Opportunity
We're looking for the Wavemakers of tomorrow.
Alphawave Semi enables tomorrow’s future by accelerating the critical data communication at the heart of our digital world – from seamless video streaming to AI to the metaverse and much more. Our technology powers product innovation in the most data-demanding industries today, including data centers, networking, storage, artificial intelligence, 5G wireless infrastructure, and autonomous vehicles. Customers partner with us for mission-critical data communication, our innovative technologies, and our proven track record. Together, we enable the next generation of digital technology.
What You'll Do
- Design and implement state-of-the-art DFT architecture to meet growing industry demands for efficient test and debug capabilities.
- Generate and Insert DFT structures at the RTL and gate levels, verifying the correct operation of those structures from RTL to back-annotated gates.
- Generate scan-inserted netlists, produce ATPG patterns to achieve coverage targets, and simulate them for correctness.
- Run timing analysis, review constraints and waivers, analyze violations, and work with other teams to fix the design.
- Produce ATE test patterns for MBIST, Scan, Functional & analog testing and support silico ATE testing and debug.
- Participate in diagnostics and failure analysis for customer returns.
- Mentor and lead a team of junior engineers to accomplish all the above tasks within the defined project constraints.
What you'll need:
- Bachelor's degree in engineering science, Electrical and Computer Engineering or Computer Science
- 8+ years of experience in complex SoC designs in RTL, DFT or FE capacity. Candidates with less experience may be considered
- Experience with various DFT EDA tools from Siemens, SNPS and Cadence
- Good knowledge and understanding in Verilog/VHDL and SystemVerilog
- Exposure to CAD and automation. Knowledge of TCL and Python is a plus.
- Experienced with main DFT standards such as JTAG (1149.1/1149.6/1500), iJTAG (1687) and BIST techniques (memory BIST, logic BIST, interconnect BISTs)
- Track record in integrating custom made DFT logic for complex SoCs (System-On-Chip) or CoWoS (Chip-On-Wafer-On-Substrate) designs is highly desirable.
- Experience in SoC and IP/Block level scan insertion and ATPG, simulation of zero delay and SDF annotated test sequences.
"Hybrid work environment"
Your base pay is one component of your compensation. It is influenced by your qualifications, experience and the internal equity of our team to ensure fairness and consistency across roles. In addition to our comprehensive benefits package, employees are also eligible to participate the Employee Stock Purchase Plan (ESPP)
You’ll also be able to take advantage of the competitive benefits mentioned below.
- Collective Health Insurance
- Employee Assistance Program (EAP)
- Comprehensive health plans
- Preventive Medicine Center -Malram at Ichilov Hospital
- Paid Time Off
- Retirement Savings
- Gym
- Meal Card
- High-Tech Zone Club Membership
Diversity & Inclusivity
Alphawave Semi is based in one of the most diverse countries in the world. This includes differences related to race, ethnicity, national origin, gender, gender expression and presentation, sexual orientation, religion, age, ability and socioeconomic status. To us, diversity is one of our strongest assets to our organization. We commit ourselves to promoting the recognition and appreciation of our diverse and rich culture. We believe it is critical to our success to promote freedom of thought and opinion in a respectful environment. Our decisions are rooted in respectfully considering each other’s thoughts and opinions and working towards a greater common goal.
Accommodation
Alphawave Semi is an equal opportunity employer and welcomes applications from all qualified individuals, including visible minorities, Indigenous People, and persons with disabilities. We welcome and encourage applications from people with disabilities. If, as a qualified job applicant, you request an accommodation, Alphawave Semi will consult with you to provide reasonable accommodations according to your specific needs. If you wish to make a request, you will be provided an opportunity if you’re application is selected to proceed in our hiring process.
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