RETURNSHIP - Software Engineer

The Path Forward Return to Work program at SambaNova is a 12-week paid returnship for experienced professionals returning to the workforce after taking time off for caregiving. The program is open to individuals who have at least 5 years of professional experience and have been out of the paid workforce for at least two years to focus on caring for a child or other dependent. If you meet these criteria, we welcome you to apply. (Please note: This Returnship opportunity is available only at our Palo Alto, CA site.)

At SambaNova we are excited to be part of the Path Forward program because we appreciate the skills you can offer, the perspective you provide, and the contributions you will make. This program offers you a chance to revamp your skills, update your resume with new experience, and make connections with others transitioning back to the workforce. It also offers support through Path Forward, a nonprofit organization on a mission to empower people who’ve been focused on caregiving transition back to the paid workforce.

Are you ready for a unique opportunity to work at the hardware-software boundary on technology that will set a trend for years to come? Here at SambaNova, we have assembled some of the greatest minds in the industry set on revolutionizing the AI market. DataScale® is our integrated software and hardware systems platform with optimized algorithms and next-generation processors, which delivers unmatched capabilities and efficiency across applications for training, inference, data analytics, and high-performance computing.  As a Software Engineer, you will help take ML models to their peak performance, and get the opportunity to broaden your skills into hardware, software and ML graphs. 

Responsibilities

• Develop deep understanding of the HW architecture and dataflow compiler
• Develop complementary skills to what you already know
• Design and implement highly-parallel algorithms and kernels to maximize performance
• Test for function and performance with ML or HPC applications, working across hardware, compiler and runtime layers

What you bring

• Strong communication skills
• Growth mindset and excellent problem solving skills
• Own the problem, show technical leadership  
• Respectful, team-player, mentor

Skills and Qualifications

• Knowledge of Computer architecture, pipelining & hardware performance
• Familiarity with distributed memory and compute systems
• Proficient in C++, Python, understanding of Verilog/VCS
• Ability to debug functional and performance problems using VCS, Palladium, Compiler logs and Silicon performance indicators.

Preferred

• MS or PhD in EE or CS
• Demonstrated HW/SW codesign work
• Experience developing and debugging machine learning accelerator HW or SW
• Passion to write scalable, sustainable, extendable code while reducing technical debt