Hardware/Software Co-Design Engineer

Are you ready for a unique opportunity to work at the hardware-software boundary on technology that will set a trend for years to come? Here at SambaNova, we have assembled some of the greatest minds in the industry set on revolutionizing the AI market. DataScale® is our integrated software and hardware systems platform with optimized algorithms and next-generation processors, which delivers unmatched capabilities and efficiency across applications for training, inference, data analytics, and high-performance computing. 

Accelerating ML computation demands the perfect balance between computation, memory and communication. The Sambanova RDU processor exposes hardware as a sea of compute & memory units that are seamlessly reconfigurable by our dataflow compiler to achieve the perfect balance that maximizes a network’s performance. Super-optimization of commonly used operators to maximize performance is a cross-stack HW/SW co-design problem which requires deep understanding of pipelined hardware, compiler decision making, and ML application needs. We’re looking for HW or SW engineers with the desire and growth mindset to build on their core competence and learn new disciplines to become the true cross-stack experts who can maximize current generation performance while helping define the next several generations of dataflow architectures. 

Responsibilities

• Develop deep understanding of the HW architecture and dataflow compiler
• Develop complementary skills to what you already know.
• Design and implement highly-parallel algorithms and kernels to maximize performance
• Test for function and performance with ML or HPC applications, working across hardware, compiler and runtime layers.
  
  

Skills and Qualifications (apply if you have 3 out of 4)

• Knowledge of Computer architecture, pipelining & hardware performance
• Familiarity with distributed memory and compute systems
• Proficient in C++, Python, understanding of Verilog/VCS
• Ability to debug functional and performance problems using VCS, Palladium, Compiler logs and Silicon performance indicators.

Behaviors

• Growth mindset and excellent problem solving skills
• Passion to write scalable, sustainable, extendable code while reducing technical debt.
• Own the problem, shows technical leadership  
• Respectful, team-player, mentor.

Differentiators

• MS or PhD in EE or CS
• Demonstrated HW/SW co-design work
• Experience developing and debugging machine learning accelerator HW or SW
• Strong communication skills