About Rain:
At Rain AI, we’re creating a future with abundant and scalable artificial intelligence. We're building the world’s most cost and energy efficient hardware for AI. Our products achieve an order of magnitude improvement over the status quo by co-designing every layer of the AI stack, from circuits to algorithms. Our ultimate goal is to become the dominant hardware company of the AI era.
Rain AI is currently a Series A stage startup and backed by world leaders in AI. Our seed round was led by Sam Altman (OpenAI). In addition, our current VC partners include Y Combinator, Daniel Gross, Jaan Tallinn, Founders X Fund, Airbus Ventures, Liquid 2 Ventures and Deepwater.
About the role:
Rain AI is looking for a low power engineer to lead the low power analysis and strategy of our AI accelerators. The candidate will report directly to Rain AI’s head of hardware engineering. The role involves driving the power estimation and correlation at every level of the development stage from the architecture to the silicone power characterization. The candidate will work closely with the architecture, design, verification and physical design teams to ensure that power management techniques are effectively integrated and optimized throughout the development processes. The role also involves implementing UPF for power intent specification used during implementation and verification.
Responsibilities:
Develop and run power estimation flows used at every level of the development (architecture, design, silicon)
Perform power estimation analysis to find power savings opportunities to meet our PPA requirements
Drive power optimizations for key components of the accelerator including custom CIM
Develop and implement low power design strategies and methodologies
Define the power intent of the chip with UPF used during synthesis and simulation
Qualifications:
Bachelor’s or Master’s degree in Electrical Engineering or related field
5+ years of industry experience in low power methodologies and analysis
Hands-on experience using UPF and power analysis tools like PowerArtist and PT-PX
Strong understanding of low power design techniques, including power gating, clock gating, DVFS, and multi-voltage designs
Expertise in power analysis methodologies
Familiarity with scripting and programming languages such as Python for automation and analysis
Strong communication and teamwork skills
Our Benefits:
Medical Insurance with 100% coverage of employee premiums
Dental and Vision Insurance
401k match
Unlimited PTO + all federal holidays
Two weeks off around Christmas and New Years
Summer “shutdown”: one week-off for all employees
Work from anywhere in the United States
$500 of office equipment per year
And more!
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