Dtech DLP IP Design Engineer - Staff

Company:

Qualcomm India Private Limited

Job Area:

Engineering Group, Engineering Group > Hardware Engineering

General Summary:

- 7+ years RTL Design/Hardware Engineering experience or related work experience.

Skills/Experience Required

- Strong Domain Knowledge on RTL Design , implementation, and integration.

- Experience with RTL coding using Verilog/VHDL/System Verilog.

- Experience in micro-architecture & designing cores and ASICs.

- Familiar with the Synthesis, Formal Verification, Linting, CDC, Low Power, UPFs, etc.

- Exposure in scripting (Pearl/Python/TCL).

- Strong debugging capabilities at simulation, emulation, and Silicon environments.

- Collaborate closely with cross-function team to research, design and implement performance and power management strategy for product roadmap.

- Good team player. Need to interact with the other teams/verification engineers proactively.

- Ability to debug and solve issues independently.

Responsibilities:

- Design Engineer/lead to take care of Front-end design activities.

- Design low power/power management controller IP blocks including AVS (adaptive voltage scaling), ACD (adaptive clock distribution), on-chip sensor controller.

- Perform RTL design, simulation, synthesis, timing analysis, lint check, clock domain crossing check, conformal low power check, and formal verification for IP blocks.

- Work closely with technology/circuit design team to close IP block specification/requirement.

- Work closely with verification/physical design team to complete the IP design implementation.

- Support SoC team to integrate low power / power management IP solution into wireless SoC chips and front-end design flows.

- Work closely with system/software/test team to enable the low power feature in wireless SoC product.

- Evaluate new low-power technologies and analyze their applications to address requirements.

- Provide feedback for low-power chip and system architecture.

- Understand and perform block & chip-level power analysis & create block-level power models.

Minimum Qualifications:

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.
OR
Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience.
OR
PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.

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