ASIC Design Engineer- Sr Lead

2 to 7 years of hardware experience involving design and integration of large complex Sub-systems/ SoCs.

Experience in ASIL/Functional Safety for ADAS is preferred.

Design experience in Multimedia Domain with good knowledge preferably on Video Codecs / Computer Vision / AI / ML/ Hardware Architecture is a plus.

Should have knowledge of AMBA protocols - AXI, AHB, APB, with clocking/reset/debug architectures.

Hands on experience in Low power design is required

Hands on experience in Multi Clock designs, Asynchronous interfaces is required

Experience in ASIC development flow such as Lint, CDC, Synthesis and CLP is required.

Understanding of constraint development and timing closure is a plus.

Experience in Synthesis / Functional ECOs / Understanding of timing concepts is a plus.

Work closely with the verification and validation teams for pre/post Silicon debug

Excellent oral and written communications skills

Proactive, creative, curious, motivated to learn and good collaborative skills.