Principal Logic Design Engineer

Microsoft is a highly innovative company that collaborates across disciplines to produce cutting edge technology that changes our world. Microsoft’s Silicon team builds custom silicon for a diverse set of systems ranging from innovative consumer products like Xbox to high-performance Azure cloud servers, clients, and augmented reality.  
  
We are looking for a Principal Logic Design Engineer to work on leading edge IP development as part of the SCIPS Semi-custom and Central IP Silicon team. The candidate should be a motivated self-starter who will thrive in this cutting-edge technical environment.  
  
Microsoft’s mission is to empower every person and every organization on the planet to achieve more. As employees we come together with a growth mindset, innovate to empower others, and collaborate to realize our shared goals. Each day we build on our values of respect, integrity, and accountability to create a culture of inclusion where everyone can thrive at work and beyond. We’re committed to a diverse and inclusive workplace and strongly encourage applicants from all background and walks of life. Difference makes us better.

Required Qualifications: 

• 9+ years of related technical engineering experience 
  • OR Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+ years technical engineering experience or internship experience 
  • OR Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience or internship experience 
  • OR Doctorate degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience 
• Experience in Digital Design including microarchitecture specification development and RTL coding in Verilog/System Verilog   
• Experience in developing/optimizing high speed ASIC CMOS designs
• Proficiency in Verilog, System Verilog, and scripting languages such as Python, Ruby or Perl  

Other Requirements:

Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.  

Preferred:

• 15+ years technical engineering experience 
  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 12+ years technical engineering experience 
  • OR Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 8+ years technical engineering experience 
  • OR Doctorate degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience. 
• Design knowledge of the industry standard bus interfaces such as AMBA AXI protocol  
• Experience in basic floor planning, static timing analysis/closure and working with physical design teams.  
• Experience in high-performance/power efficient floating-point design  
• Experience with ensuring chip design quality through design and checklist reviews  
• Experience leading design teams  
• Worked in leading-edge technologies: 5 nm or newer  
• Expertise in Clock Domain Crossing (CDC), Reset Domain Crossing (RDC), and LINT closure.  

Silicon Engineering IC5 - The typical base pay range for this role across the U.S. is USD $137,600 - $267,000 per year. There is a different range applicable to specific work locations, within the San Francisco Bay area and New York City metropolitan area, and the base pay range for this role in those locations is USD $180,400 - $294,000 per year.

Certain roles may be eligible for benefits and other compensation. Find additional benefits and pay information here: https://careers.microsoft.com/us/en/us-corporate-pay

Microsoft will accept applications for the role until December 25, 2024.

Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, color, family or medical care leave, gender identity or expression, genetic information, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran status, race, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable laws, regulations and ordinances.  We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. If you need assistance and/or a reasonable accommodation due to a disability during the application or the recruiting process, please send a request via the Accommodation request form.

Benefits/perks listed below may vary depending on the nature of your employment with Microsoft and the country where you work.

#SCIPS

#AHSI #SCHIE

#azurehwjobs 

You will be responsible for all facets of design including working with the architecture team, defining/implementing the microarchitecture of IP blocks, RTL design, synthesis, static timing analysis, and silicon validation. Throughout the program you will be interacting with architects for feature definition, interacting with various design teams for leverage and collaboration, and working closely with design verification and software teams.  Experience working with high speed microarchitecture design required. We are also looking for strong design team leadership experience. 

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