Job Details:

Job Description: 

You care about the art of robust design at exceptional PPA and how to incorporate to Intel products in highly advanced Si-technologies? You want to drive customer experience and environmental sustainability by long product lifetimes? Then you are a perfect candidate for the position of a Senior Design Quality and Reliability Engineer in the Munich-based Technology Enabling team. Within an international team of experts, you will work on tasks like:

• Develop verification, simulation and AI methodologies for design reliability checks (aging, TDDB, EOS) and enable them in design system for seamless execution of reliability verification by  design teams.

• Collaborate with leading edge silicon foundries and EDA companies to improve tech collaterals and TFM methodologies for new product challenges.

• Apply methodologies to assess impact of degradation mechanisms on circuit and IP-level and work with design teams as well as internal and external IP suppliers to secure reliability.

• Provide comprehensive documentation and training to design teams.

• Support reliability verification and sign-off in design execution of Intel design teams world-wide.

Qualifications:

• University / University of applied sciences: Bachelor/Master degree in Physics, Electrical Engineering or similar required

• Profound (min. 3 years of) experience as Design Quality and Reliability Engineer or as analog / mixed signal design engineer, preferably in the area of reliability simulation for aging, TDDB, EOS

• Deep knowledge of advanced logic design methodologies and practices, preferably in collaboration with Silicon Foundries.

• Sound background in silicon reliability physics and silicon process technology

• Hands on experience in coding and scripting (e.g. Python, Matlab) to solve everydays engineering tasks

• Enthusiastic about continuous learning

• Passionate communicator with strong presentation skills

• Language: English fluent (verbal and writing)

Beneficial:

• Experience in Automotive design

• Exposure to AI-methods in EDA-context

• Language: German

          

Job Type:

Experienced Hire

Shift:

Shift 1 (Germany)

Primary Location: 

Germany, Munich

Additional Locations:

Business group:

In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel’s products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore’s Law and groundbreaking innovations.  DEG is Intel’s engineering group, supplying silicon to business units as well as other engineering teams.  As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.