Intel

Manufacturing Integration Systems Engineer

US
Python Assembly
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Description

Job Details:

Job Description: 

About the Group

Technology Development (TD) is the heart and soul of Moore’s Law at Intel. TD has enabled Intel to create world-changing technology that enriches the lives of every person on earth. TD’s more than 13,000 employees drive breakthrough research, develop next generation process and packaging technologies, while also running high volume manufacturing operations in its state-of-the-art facilities in Oregon and Arizona.

 

​​​​​​​The Logic Technology Development (LTD) team in TD, delivers programs and modules to ramp new process nodes, supports HVM and provides a predictable technology cadence for Intel customers. The D1 Manufacturing Integration Engineering (MIE) Systems Group in LTD is dedicated to improving the effectiveness and quality of the MIE organization through the development of new tools and streamlined systems.

 

About the Role

D1 Manufacturing Integration Engineers are responsible for enabling the manufacture of innovative device architectures on leading technology nodes. They design, execute, and analyze experiments necessary to meet engineering specifications for their process(es). Participate in development of intellectual property. Optimize the manufacturing line by integrating the many individual steps necessary for the manufacture of complex microprocessors. Leverage available TD, initial ramp and manufacturing volumes to demonstrate the technology meets requirements while simultaneously transferring the technology to counterparts in manufacturing via the Copy Exactly methodology.

Responsibilities and Duties

  • Engage with customers in MIE, Module Engineering, TD Integration, and Yield Analysis to develop solutions to their most pressing systems needs
  • Manage multiple complex projects and meeting customer need dates.
  • Develop robust, well documented, and transferable code using JSL, Python, etc
  • Maintain a high level of expertise in TMI Integration and/or Defect Metrology engineering processes.
  • Implement efficiency improvement projects supporting MIE engineers.

Qualifications:

  • Masters or Ph.D. in Electrical Engineering, Materials Science, Chemical Engineering, Chemistry, Physics, Mechanical Engineering or related field.
  • 10+ years of experience in semiconductor manufacturing.

          

Job Type:

Experienced Hire

Shift:

Shift 1 (United States of America)

Primary Location: 

US, Oregon, Hillsboro

Additional Locations:

Business group:

As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support.  Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

This role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

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