Sr Solutions Engineer – AE ( Verification )

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Job Title: Sr Solutions Engineer - AE

Location: Bangalore

Experience: 2 – 5 years

Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality.  Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health.

The Cadence Advantage

• The opportunity to work on cutting-edge technology in an environment that encourages you to be creative, innovative, and to make an impact.
• Cadence’s employee-friendly policies focus on the physical and mental well-being of employees, career development, providing opportunities for learning, and celebrating success in recognition of specific needs of the employees.
• The unique “One Cadence – One Team” culture promotes collaboration within and across teams to ensure customer success
• Multiple avenues of learning and development available for employees to explore as per their specific requirement and interests
• You get to work with a diverse team of passionate, dedicated, and talented individuals who go above and beyond for our customers, our communities, and each other—every day.

Job Summary

Design Verification expert with good subsystem and SOC level verification. Must possess excellent debug skills. Expert in developing SV UVM based testbenches. Ability to coach and mentor less experience teammates. Should have worked on time-bounded projects leading to Si realization.

Job Description

Independently handle verification of complex modules or own significant piece in subsystem / SOC based verification. Define methodology for subsystem/SOC verification. Mentor less experienced engineers to bring them up as independent verification engineer. Follow systematic approach of metric driven verification with meticulous attention to quality and completeness. Should be able work closely across teams to meet delivery timelines.

Required experience

• Worked on Subsystem / SOC level verification projects
• Experience in ARM based designs.
• In-depth knowledge SV-UVM
• Expertise in architecting, design and development of scalable verification environments from scratch. Define verification architecture and verification strategy
• Expertise in verification test plan development, test cases coding; Execute and debug test cases to achieve functional and code coverage goals
• Experience in C based testcase development
• Strong knowledge of AMBA protocols like AXI, ACE, APB, AHB.
• Strong problem solving skills. Exhibit discipline, thoroughness and methodical approach in solving problems
• Ability to work with stakeholders across cross-functional teams – Architecture, Design, Internal and External Customers
• Experience in mentoring junior engineers
• Self-driven and committed individual who can work in a fast paced project environment

Desirable skills and experience

• Power Aware Verification experience is highly desirable
• Gate Level Simulation experience will be a positive.
• Formal Verification experience
• Cadence verification tool experience

Strong vocabulary, communication, organizational, planning, and presentation skills are essential. Ability to work independently and productively with high quality output and results in a fast paced and dynamic environment. A strong positive attitude and ability to work in a team is a must. Self-motivated and willing take up additional responsibilities to contribute to team’s success.

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