Cadence Design Systems

Lead Systems Engineer -High Speed Interconnect IPs.

San Jose, CA US
USD 131k - 244k
R
Description

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

  

Join a growing and dynamic IP team and help lead the development of best in class digital and mixed signal IP and subsystem products.  This is a tremendous opportunity to work with an experienced team focusing on development of high-performance silicon subsystems   integrating Controller and PHY  IPs related to protocols such as PCIe/CXL, UCIe , Ethernet…. 

You will be a key member of technical staff in an organization responsible for IP activities including but not limited to developing sub system prototypes in hardware and software, Help Product marketing team in sub system solutions launch, Pre-sales technical engagement with potential customers. This candidate will be the primary interface between customers (internal and external) customers CDNS R&D/ Silicon Systems validation team. Candidate should possess strong communication skills with ability to manage multiple priorities on day-to-day basis. Ownership of tasks, ability to collaborate with remote teams located worldwide and clear communication of status, are must have attributes in this role. 

The annual salary range for California is $131,600 to $244,400. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.

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